Silicon monolithic Integrated circuit

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Compact 1ch Clock Generators for Digital Cameras

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Silicon monolithic Integrated circuit

2 Pair/1 Pair ETSI Compatible HDSL Analog Front End

GENERAL DESCRIPTION The AD5011 is an analog front end for two pair or single pair HDSL applications that use 1168 kbps or 2.32 Mbps data rates. The device integrates all the transmit and receive functional blocks. A standard serial interface is used to communicate with the DAC and ADC. The filter

SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3

DESCRIPTION The PM7346 S/UNI-QJET is a quad ATM physical layer processor with integrated DS3, E3, and J2 framers. PLCP sublayer DS1, DS3, E1, and E3 processing is supported as is ATM cell delineation. The S/UNI-QJET contains integral DS3 framers, which provide DS3 framing and error accumulation

Shock absorbing RAM addresser

GENERAL DESCRIPTION The SAA7346 can be used to make a CD player insensitive to shocks. To do this, SAA7346 operates closely with a standard 1 Mbit or 4 Mbit DRAM. Audio data is stored inside the DRAM and during shocks the data of the DRAM can be played. The SAA7346 functions as a customized DRAM

Shock absorbing RAM addresser

GENERAL DESCRIPTION The SAA7346 can be used to make a CD player insensitive to shocks. To do this, SAA7346 operates closely with a standard 1 Mbit or 4 Mbit DRAM. Audio data is stored inside the DRAM and during shocks the data of the DRAM can be played. The SAA7346 functions as a customized DRAM

DIGITAL CONTROLLED SURROUND SOUND MATRIX

DESCRIPTION The TDA7346 reproduces surround sound by using phase shifters and a signal matrix. Control of all the functions is accomplished by serial bus. The AC signal setting is obtained by resistor networks and switches combined with operational amplifiers. 1 STEREO INPUT THREE IN