Dual 4-bit static shift register

●Description BU4015B series ICs are 4-stage static shift registers, each consisting of 2 circuits. The D flip-flops of each stage share a common reset input, enabling asynchronous reset at any time. BU4021B series ICs are 8-bit static shift registers configured with 8 register cells, each o

High Voltage CMOS Logic ICs >Logic>

文件：504.91 Kbytes Page：18 Pages

Dual 4-bit static shift register

High Voltage CMOS Logic ICs(BU4S,BU4000B Series)

●Description\nBU4015B series ICs are 4-stage static shift registers, each consisting of 2 circuits. The D flip-flops of each stage share a common reset input, enabling asynchronous reset at any time. \nBU4021B series ICs are 8-bit static shift registers configured with 8 register cells, each of whic  1)  Low power consumption\n 2)  Wide operating supply voltage range\n3) High impedance\n 4)  High fan out\n 5)  L-TTL2 and LS-TTL1 inputs can be driven directly.●Applications\nBU4015B: serial / parallel data conversion and ring counter. \nBU4021B: control circuits, timing circuits and as a general ;

封装/外壳：16-SOIC（0.173"，4.40mm 宽） 功能：串行至并行 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC SHIFT REGISTER DL 4BIT 16SOP 集成电路（IC） 移位寄存器

High Voltage CMOS Logic ICs >Logic>

文件：504.91 Kbytes Page：18 Pages

High Voltage CMOS Logic ICs >Logic>

文件：504.91 Kbytes Page：18 Pages

High Voltage CMOS Logic ICs >Logic>

文件：504.91 Kbytes Page：18 Pages

DUAL 4-STAGE STATIC SHIFT REGISTER WITH SERIAL INPUT/PARALLEL OUTPUT

DESCRIPTION The HCC4015B (extended temperature range) and HCF4015B (intermediate temperature range) are monolithic integrated circuits, available in 16-lead dual in-line plastic or ceramic package and plastic micropackage. ■ MEDIUM SPEED OPERATION : 12MHz (typ.) CLOCK RATE AT VDD - VSS = 10V ■

Dual 4-bit static shift register

DESCRIPTION The HEF4015B is a dual edge-triggered 4-bit static shift register (serial-to-parallel converter). Each shift register has a serial data input (D), a clock input (CP), four fully buffered parallel outputs (O0 to O3) and an overriding asynchronous master reset input (MR). Information pr

Dual 4-bit static shift register

DESCRIPTION The HEF4015B is a dual edge-triggered 4-bit static shift register (serial-to-parallel converter). Each shift register has a serial data input (D), a clock input (CP), four fully buffered parallel outputs (O0 to O3) and an overriding asynchronous master reset input (MR). Information pr

SWITCHMODE??Power Rectifier

文件：68.95 Kbytes Page：4 Pages

SWITCHMODE??Power Rectifier

文件：68.95 Kbytes Page：4 Pages