64-Mbit Flash Description

The 64-Mbit Flash memory is divided into multiple sectors and planes for erase operations. The devices can be read or reprogrammed off a single 2.7V power supply, making them ideally suited for in-system programming.

Stack Module Features

• 64-Mbit Flash + 16-Mbit PSRAM

• Power Supply of 2.7V to 3.1V

• Data I/O x16

• 66-ball CBGA Package: 8 x 11x 1.0 mm

64-Mbit Flash Features

• 64-megabit (4M x 16) Flash Memory

• 2.7V - 3.1V Read/Write

• High Performance

– Asynchronous Access Time – 70, 85 ns

• Sector Erase Architecture

– Eight 4K Word Sectors with Individual Write Lockout

– 32K Word Main Sectors with Individual Write Lockout

• Typical Sector Erase Time: 32K Word Sectors – 500 ms; 4K Word Sectors – 100 ms

• 64M, Four Plane Organization, Permitting Concurrent Read in Any of Three Planes not Being Programmed/Erased

– Memory Plane A: 16M of Memory Including Eight 4K Word Sectors

– Memory Plane B: 16M of Memory Consisting of 32K Word Sectors

– Memory Plane C: 16M of Memory Consisting of 32K Word Sectors

– Memory Plane D: 16M of Memory Consisting of 32K Word Sectors

• Suspend/Resume Feature for Erase and Program

– Supports Reading and Programming Data from Any Sector by Suspending Erase of a Different Sector

– Supports Reading Any Word by Suspending Programming of Any Other Word

• Low-power Operation

– 30 mA Active

– 35 µA Standby

• 1.8V I/O Option Reduces Overall System Power

• Data Polling and Toggle Bit for End of Program Detection

• VPP Pin for Write Protection and Accelerated Program/Erase Operations

• RESET Input for Device Initialization

• Top or Bottom Boot Block Configuration Available

• 128-bit Protection Register

• Common Flash Interface (CFI)

16-Mbit PSRAM Features

• 16-Mbit (1M x 16)

• 2.7V to 3.1V VCC Operation

• 70 ns Access Time