Description

The AS5911 is an ultra-low noise, 256-channel low power current to digital converter that enables the

readout of photodiodes of a CT detector with highest sensitivity. The output currents of 256

photodiodes are converted simultaneously into digital without any dead time resulting in no charge

loss on the inputs. The AS5911 combines current-to-voltage integration and A/D conversion for 256-

channels in one device. The ADC architecture with its low-noise integrators, coarse quantizer, sampleand-

hold and fine quantizer guarantee lowest input related noise of maximum 0.29 fC (low noise

mode) at an input current range of 0.5 μA. The input current range of the ADC is selectable between

0.5 μA and 1 μA.

The AS5911 supports two supply concepts: a single analog and true ground supply, in both modes the

photodiodes are zero biased for ultra-low dark current of the photodiode. In true ground mode, the

AS5911 operates at ±1.5 V dual analog supply while in single supply mode only a single analog

supply of +3.0 V is needed. The device detects automatically the chosen supply concept. No external

components are required for supply decoupling. To reduce PCB area and simplify the assembly

process, decoupling capacitors for supply and reference voltages are integrated in the 14 x 14 mm²

FBGA package. The on-chip LDOs, reference voltages and a temperature sensor minimize the

external component requirements and reduces the bill of material.

Full-scale range, integration time and power mode are configurable over a SPI-compatible serial

interface as well as the digital output modes of the LVDS interface. In low power mode, the power

dissipation can be minimized down to 1.25 mW per channel for reduced self-heating of the CT

detector. The adjustable integration time down to 51 μs allow very high frame rates. The operating

range of AS5911 is specified from 0 °C to 85 °C.

Features

No external components required. Integrated

capacitors for supply and reference decoupling

No charge loss. Continuous charge integration

due to zero dead time of ADC architecture

Selectable full-scale range of 0.5 μA in low

range and 1 μA in high range

Adjustable full-scale range, integration time and

power consumption via SPI interface as well as

adjustable output modes via LVDS

Selectable power supply concept between dual

±1.5 V analog supply (true ground concept) or

single +3.0 V analog supply

On-chip LDOs, voltage references and

temperature sensor

Built-in diagnostic modes for testing full detector

signal chain