位置:LP62S16256EU-70LLT > LP62S16256EU-70LLT详情

LP62S16256EU-70LLT中文资料

厂家型号

LP62S16256EU-70LLT

文件大小

167.01Kbytes

页面数量

15

功能描述

256K X 16 BIT LOW VOLTAGE CMOS SRAM

数据手册

下载地址一下载地址二

生产厂商

AMICC

LP62S16256EU-70LLT数据手册规格书PDF详情

General Description

The LP62S16256E-T is a low operating current 4,194,304- bit static random access memory organized as 262,144 words by 16 bits and operates on low power voltage from 2.7V to 3.3V. It is built using AMICs high performance CMOS process.

Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

The chip enable input is provided for POWER-DOWN, device enable. Two byte enable inputs and an output enable input are included for easy interfacing.

Data retention is guaranteed at a power supply voltage as low as 2.0V.

Features

■ Operating voltage: 2.7V to 3.6V

■ Access times: 55ns / 70ns (max.)

■ Current:

Very low power version: Operating: 40mA (max.)

Standby: 10mA (max.)

■ Full static operation, no clock or refreshing required

■ All inputs and outputs are directly TTL-compatible

■ Common I/O using three-state output

■ Data retention voltage: 2.0V (min.)

■ Available in 44-pin TSOP and 48-ball CSP (6×8mm) packages

LP62S16256EU-70LLT产品属性

  • 类型

    描述

  • 型号

    LP62S16256EU-70LLT

  • 制造商

    AMICC

  • 制造商全称

    AMIC Technology

  • 功能描述

    256K X 16 BIT LOW VOLTAGE CMOS SRAM

更新时间:2025-10-12 16:47:00
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