General Description

The LP61L1008 is a high speed 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a single 3.3V power supply.

Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

The chip enable input is provided for POWER-DOWN and device enable and an output enable input is included for easy interfacing.

Data retention is guaranteed at a power supply voltage as low as 2.0V.

Features

■ Single 3.3V ± 10 power supply

■ Access times: 12/15 ns (max.)

■ Current: Operating: 180mA (max.)

Standby: 5mA (max.)

■ Full static operation, no clock or refreshing required

■ All inputs and outputs are directly TTL compatible

■ Center Power/Ground Pin Configuration

■ Common I/O using three-state output

■ Output enable and two chip enable inputs for easy application

■ Data retention voltage: 2.0V (min.)

■ Available in 32-pin SOJ 300 mil and 32-pin sTSOP packages