位置:5M570ZE64A4N > 5M570ZE64A4N详情

5M570ZE64A4N中文资料

厂家型号

5M570ZE64A4N

文件大小

1175.96Kbytes

页面数量

72

功能描述

MAX V Device Core

MAX V Device Handbook

数据手册

下载地址一下载地址二到原厂下载

生产厂商

ALTERA

5M570ZE64A4N数据手册规格书PDF详情

Feature Summary

The following list summarizes the MAX V device family features:

■ Low-cost, low-power, and non-volatile CPLD architecture

■ Instant-on (0.5 ms or less) configuration time

■ Standby current as low as 25 µA and fast power-down/reset operation

■ Fast propagation delay and clock-to-output times

■ Internal oscillator

■ Emulated RSDS output support with a data rate of up to 200 Mbps

■ Emulated LVDS output support with a data rate of up to 304 Mbps

■ Four global clocks with two clocks available per logic array block (LAB)

■ User flash memory block up to 8 Kbits for non-volatile storage with up to 1000

read/write cycles

■ Single 1.8-V external supply for device core

■ MultiVolt I/O interface supporting 3.3-V, 2.5-V, 1.8-V, 1.5-V, and 1.2-V logic levels

■ Bus-friendly architecture including programmable slew rate, drive strength,

bus-hold, and programmable pull-up resistors

■ Schmitt triggers enabling noise tolerant inputs (programmable per pin)

■ I/Os are fully compliant with the PCI-SIG® PCI Local Bus Specification, revision

2.2 for 3.3-V operation

■ Hot-socket compliant

■ Built-in JTAG BST circuitry compliant with IEEE Std. 1149.1-1990

Table 1–1 lists the MAX V family features.

5M570ZE64A4N产品属性

  • 类型

    描述

  • 型号

    5M570ZE64A4N

  • 制造商

    ALTERA

  • 制造商全称

    Altera Corporation

  • 功能描述

    MAX V Device Handbook

更新时间:2021-9-14 10:50:00
供应商 型号 品牌 批号 封装 库存 备注 价格
ALTERA
25+
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23+
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18+
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14+
1218
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24+
256-FBGA(17x17)
66800
原厂授权一级代理,专注汽车、医疗、工业、新能源!
ALTERA/阿尔特拉
23+
NA
1218
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21+
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