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A6810EEP中文资料

厂家型号

A6810EEP

文件大小

150.16Kbytes

页面数量

8

功能描述

DABiC-IV, 10-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS

数据手册

下载地址一下载地址二到原厂下载

生产厂商

ALLEGRO

A6810EEP数据手册规格书PDF详情

The A6809– and A6810– devices combine 10-bit CMOS shift registers, accompanying data latches and control circuitry with bipolar sourcing outputs and pnp active pull downs. Designed primarily to drive vacuum-fluorescent displays, the 60 V and -40 mA output ratings also allow these devices to be used in many other peripheral power driver applications. The A6809– and A6810– feature an increased data input rate (compared with the older UCN/UCQ5810-F) and a controlled output slew rate. The A6809xLW and A6810xLW are identical except for pinout.

The CMOS shift register and latches allow direct interfacing with microprocessor-based systems. With a 3.3 V or 5 V logic supply, typical serial-data input rates are up to 33 MHz.

A CMOS serial data output permits cascade connections in applications requiring additional drive lines. Similar devices are avail-able as the A6811– (12 bits), A6812– (20 bits), and A6818– (32 bits). The A6809– and A6810– output source drivers are npn Darling tons, capable of sourcing up to 40 mA. The controlled output slew rate reduces electromagnetic noise, which is an important consideration in systems that include telecommunications and/or microprocessors and to meet government emissions regulations. For inter-digit blanking, all output drivers can be disabled and all sink drivers turned on with a BLANKING input high. The pnp active pull-downs will sink at least 2.5 mA.

All devices are available in two temperature ranges for optimum performance in commercial (suffix S-) or industrial (suffix E-) applications. The A6810– is provided in three package styles for through-hole DIP (suffix -A), surface-mount SOIC (suffix -LW), or minimum-area surface-mount PLCC (suffix -EP). The A6809– is provided in the SOIC (suffix -LW) only. Copper lead frames, low logic-power dissipation, and low output-saturation voltages allow all devices to source 25 mA from all outputs continuously over the maximum operating temperature range.

FEATURES

■ Controlled Output Slew Rate

■ High-Speed Data Storage

■ 60 V Minimum Output Breakdown

■ High Data Input Rate

■ PNP Active Pull-Downs

■ Low Output-Saturation Voltages

■ Low-Power CMOS Logic and Latches

■ Improved Replacements

for TL4810–, UCN5810–, and UCQ5810–

A6810EEP产品属性

  • 类型

    描述

  • 型号

    A6810EEP

  • 制造商

    ALLEGRO

  • 制造商全称

    Allegro MicroSystems

  • 功能描述

    DABiC-IV, 10-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS

更新时间:2025-10-4 13:52:00
供应商 型号 品牌 批号 封装 库存 备注 价格
ALLEGRO
1630+
PLCC20
520
代理品牌
ALLEGRO
2023+
PLCC20
58000
进口原装,现货热卖
ALLEGRO
24+
SOP
2500
ALLEGRO
10+
SOP-20
7800
全新原装正品,现货销售
ALLEGRO
24+
SOP20
5650
公司原厂原装现货假一罚十!特价出售!强势库存!
ALLEGRO
SOP-20
491
全新原装100真实现货供应
ALLEGRO
25+
SOP20
2987
只售原装自家现货!诚信经营!欢迎来电!
ALLEGRO
24+
SOP20
6540
原装现货/欢迎来电咨询
ALLEGRO
25+
SOP-20
1001
就找我吧!--邀您体验愉快问购元件!
ALLEGRO
2019+/2020+
SOP20
1500
原装正品现货库存