features

• Dual ARM Cortex-M0+ @ 133MHz

• 264kB on-chip SRAM in six independent banks

• Support for up to 16MB of off-chip Flash memory via dedicated QSPI bus

• DMA controller

• Fully-connected AHB crossbar

• Interpolator and integer divider peripherals

• On-chip programmable LDO to generate core voltage

• 2 on-chip PLLs to generate USB and core clocks

• 30 GPIO pins, 4 of which can be used as analog inputs (not all GPIO are brought out on this board)

• Peripherals

• 2 UARTs

• 2 SPI controllers

• 2 I2C controllers

• 16 PWM channels

• USB 1.1 controller and PHY, with host and device support

• 8 PIO state machines