FEATURES

► Programmable FastDSP audio processing engine

► Up to 768 kHz sample rate

► Biquad filters, limiters, volume controls, mixing

► Tensilica HiFi 3z DSP core

► Quad MAC per cycle: 24 × 24-bit multiplier and 64-bit accumulator

► Flexible power operation mode: 24.576 MHz, 49.152 MHz,

73.728 MHz, and 98.304 MHz

► 336 kB total memory

► JTAG debug and trace

► Low latency, 24-bit ADCs, and DAC

► 106 dB SNR (signal through ADC with A-weighted filter)

► 110 dB combined SNR (signal through DAC and headphone

with A-weighted filter)

► Programmable double precision MAC engine for maximum 24-

stage equalizer

► Serial-port sample rates from 8 kHz to 768 kHz

► 5 μs group delay (fS = 768 kHz) analog in to analog out with

FastDSP bypass (zero instructions)

► 3 differential or single-ended analog inputs, configurable as microphone

or line inputs

► 8 digital microphone inputs

► Analog differential audio output, configurable as either line output

or headphone driver

► 2 PDM output channels

► PLL supporting any input clock rate from 30 kHz to 36 MHz

► 4 channel asynchronous sample rate converters (ASRCs)

► 2, 16-channel serial audio ports supporting I2S, left-justified,

right-justified, or up to TDM16 (TDM12 in turbo mode)

► 8 interpolators and 8 decimators with flexible routing

► Power supplies

► Analog AVDD at 1.8 V typical

► Digital I/O IOVDD at 1.1 V to 1.98 V

► Digital DVDD at 0.85 V to 1.21 V

► Headphone HPVDD_L at 1.2 V to AVDD

► Control/communication interfaces

► I2C, SPI, or UART control ports

► Main quad SPI (QSPI)

► UART communication port

► Self-boot from QSPI flash

► Flexible GPIO and IRQ

► AEC-Q100 qualified for automotive applications

APPLICATIONS

► Automotive audio systems

► Digital audio effects processors