Differential PECL to CMOS/TTL Translator

DESCRIPTION The AZ100ELT21 is a differential PECL to CMOS/TTL translator. Because PECL (Positive ECL) levels are used, only VCC and ground are required. The small outline 8-lead packaging and the single gate of the ELT21 makes it ideal for those applications where space, performance and low power

Differential PECL to CMOS/TTL Translator

文件：146.6 Kbytes Page：5 Pages

3.0 V-5.5 V, differential PECL to CMOS/TTL translator

Differential PECL to CMOS/TTL Translator

DESCRIPTION The AZ100ELT21 is a differential PECL to CMOS/TTL translator. Because PECL (Positive ECL) levels are used, only VCC and ground are required. The small outline 8-lead packaging and the single gate of the ELT21 makes it ideal for those applications where space, performance and low power

Differential PECL to CMOS Translator

The AZ100ELT21 is a differential PECL to CMOS/TTL translator. Because PECL (Positive ECL) levels are used, only VCC and ground are required. The small outline 8-lead packaging and the low skew, dual gate design of the AZ100ELT21 makes it ideal for applications that require the translation of a clock • 3.5ns propagation delay\n\n\n• PECL inputs\n• CMOS/TTL outputs\n\n\n• 5V analog supply\n• Industrial Temp Range: -40°C to 85°C;

Differential PECL to CMOS/TTL Translator

文件：406.2 Kbytes Page：6 Pages

Differential PECL to CMOS/TTL Translator

文件：146.6 Kbytes Page：5 Pages

Differential PECL to CMOS/TTL Translator

文件：146.6 Kbytes Page：5 Pages

Differential PECL to TTL Translator

Description The MC10ELT/100ELT21 is a differential PECL to TTL translator. Because PECL (Positive ECL) levels are used, only +5 V and ground are required. The small outline 8-lead package and the single gate of the ELT21 makes it ideal for those applications where space, performance and low pow

3.3V DIFFERENTIAL LVPECL-to-LVTTL TRANSLATOR

DESCRIPTION The SY10/100ELT21L are single differential LVPECL-to-LVTTL translators using a single +3.3V power supply. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The small outline 8-lead SOIC package and low skew single gate design make the ELT21

3.3V DIFFERENTIAL LVPECL-to-LVTTL TRANSLATOR

DESCRIPTION The SY10/100ELT21L are single differential LVPECL-to-LVTTL translators using a single +3.3V power supply. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The small outline 8-lead SOIC package and low skew single gate design make the ELT21

DIFFERENTIAL PECL-to-TTL TRANSLATOR

DESCRIPTION The SY10/100ELT21 are single differential PECL-to-TTL translators. Because PECL (Positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and low skew single gate design make the ELT21 ideal for applications that require the translation

DIFFERENTIAL PECL-to-TTL TRANSLATOR

DESCRIPTION The SY10/100ELT21 are single differential PECL-to-TTL translators. Because PECL (Positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and low skew single gate design make the ELT21 ideal for applications that require the translation