5K - 50K Gates Coprocessor FPGA with FreeRAM

Description The AT40KAL is a family of fully PCI-compliant, SRAM-based FPGAs with distributed 10ns programmable synchronous/asynchronous, dual-port/single-port SRAM, eight global clocks, Cache Logic ability (partially or fully reconfigurable without loss of data), automatic component generators,

Programmable System Level Integration Prototyping System

Description The Atmel ATDH40M prototyping system allows designers to quickly and economically evaluate Atmel’s family of AT40K/AT40KAL FPGA and AT94K Field Programmable System Level Integrated Circuit (FPSLIC™) devices and Atmel’s AT17 FPGA configuration memory devices. The ATDH40M board connects

Programmable Logic: Field Programmable Gate Array Products

This 20,000 to 30,000-gate fully PCI-compliant, SRAM-based FPGA features distributed 10-ns programmable synchronous/asynchronous, dual-port/single-port SRAM, 8 global clocks, Cache Logic® ability (partially or fully reconfigurable without loss of data), and automatic component generators. It has a 2

封装/外壳：100-TQFP 包装：托盘 描述：IC FPGA 78 I/O 100TQFP 集成电路（IC） FPGA（现场可编程门阵列）

封装/外壳：352-LBGA 包装：托盘 描述：IC FPGA 256 I/O 352SBGA 集成电路（IC） FPGA（现场可编程门阵列）

Programmable System Level Integration Prototyping System

Description The Atmel ATDH40M prototyping system allows designers to quickly and economically evaluate Atmel’s family of AT40K/AT40KAL FPGA and AT94K Field Programmable System Level Integrated Circuit (FPSLIC™) devices and Atmel’s AT17 FPGA configuration memory devices. The ATDH40M board connects

5K - 50K Gates Coprocessor FPGA with FreeRAM

Description The AT40K/AT40KLV is a family of fully PCI-compliant, SRAM-based FPGAs with distributed 10 ns programmable synchronous/asynchronous, dual-port/single-port SRAM, 8 global clocks, Cache Logic ability (partially or fully reconfigurable without loss of data), automatic component generator

5K - 50K Gates Coprocessor FPGA with FreeRAM

Description The AT40K/AT40KLV is a family of fully PCI-compliant, SRAM-based FPGAs with distributed 10 ns programmable synchronous/asynchronous, dual-port/single-port SRAM, 8 global clocks, Cache Logic ability (partially or fully reconfigurable without loss of data), automatic component generator