AM654x, AM652x Sitara™ Processors Silicon Revision 2.1

1 Features Processor cores: • Dual- or quad-core Arm® Cortex®-A53 microprocessor subsystem at up to 1.1 GHz – Up to two dual-core or two single-core Arm® Cortex®-A53 clusters with 512KB L2 cache including SECDED – Each A53 core has 32KB L1 ICache and 32K L1 DCache • Dual-core Arm® Cortex®

Sitara 处理器：双核 Arm Cortex-A53 和双核 Arm Cortex-R5F、千兆位 PRU-ICSS

AM654x 和 AM652xSitara™ 处理器是 Arm 应用处理器，旨在满足现代工业 4.0 嵌入式产品的复杂处理需求。\n\n AM654x 和 AM652x 器件将四个或两个 Arm Cortex-A53 内核与双 Arm Cortex-R5F MCU 子系统（包括旨在帮助客户实现其最终产品功能安全目标的特性）和三个千兆位工业通信子系统 (PRU_ICSSG) 组合在一起，从而为功能安全应用实现支持 SoC 且具有工业连接和处理能力的高性能工业控制。 AM65xx 目前正在按照 IEC 61508 标准要求，接受 TÜV SÜD 的认证评估。\n\n AM654x 中的四个 Arm 处理器内核： \n• 最多两个双核或两个单核 Arm Cortex-A53 集群（具有 512KB L2 缓存，包括 SECDED）\n• 双核 Arm Cortex-R5F（高达 400MHz） \n• 每个 R5F 内核具有 16KB 指令缓存、16KB 数据缓存和 64KB RAM\n• 三个千兆位工业通信子系统 (PRU_ICSSG) \n• 支持两个 SGMII 端口• \n• 每个 PRU_ICSSG 具有 24 个 PWM \n• 增强跳闸控制\n• 每个 PRU_ICSSG 具有 18 个 Σ-Δ 滤波器 \n• 过流逻辑\n• 每个 PRU_ICSSG 具有 6 个多协议;

Sitara Processors

文件：3.37106 Mbytes Page：299 Pages

Processors Silicon Revision 1.0

文件：4.08534 Mbytes Page：277 Pages

AM654x, AM652x Sitara??Processors Silicon Revision 2.1

文件：6.48184 Mbytes Page：282 Pages

AM654x, AM652x Sitara??Processors Silicon Revision 2.1

文件：6.48146 Mbytes Page：282 Pages

丝印代码：AM6526BACDXA；AM654x, AM652x Sitara™ Processors Silicon Revision 2.1

1 Features Processor cores: • Dual- or quad-core Arm® Cortex®-A53 microprocessor subsystem at up to 1.1 GHz – Up to two dual-core or two single-core Arm® Cortex®-A53 clusters with 512KB L2 cache including SECDED – Each A53 core has 32KB L1 ICache and 32K L1 DCache • Dual-core Arm® Cortex®

丝印代码：AM6526BACDXEAF；AM654x, AM652x Sitara™ Processors Silicon Revision 2.1

1 Features Processor cores: • Dual- or quad-core Arm® Cortex®-A53 microprocessor subsystem at up to 1.1 GHz – Up to two dual-core or two single-core Arm® Cortex®-A53 clusters with 512KB L2 cache including SECDED – Each A53 core has 32KB L1 ICache and 32K L1 DCache • Dual-core Arm® Cortex®

丝印代码：AM6526BACDXA；AM654x, AM652x Sitara??Processors Silicon Revision 2.1

文件：6.48184 Mbytes Page：282 Pages

丝印代码：AM6526BACDXA；AM654x, AM652x Sitara??Processors Silicon Revision 2.1

文件：6.48146 Mbytes Page：282 Pages

丝印代码：AM6526BACDXEAF；AM654x, AM652x Sitara??Processors Silicon Revision 2.1

文件：6.48184 Mbytes Page：282 Pages

丝印代码：AM6526BACDXEAF；AM654x, AM652x Sitara??Processors Silicon Revision 2.1

文件：6.48146 Mbytes Page：282 Pages

AM654x, AM652x Sitara™ Processors Silicon Revision 2.1

1 Features Processor cores: • Dual- or quad-core Arm® Cortex®-A53 microprocessor subsystem at up to 1.1 GHz – Up to two dual-core or two single-core Arm® Cortex®-A53 clusters with 512KB L2 cache including SECDED – Each A53 core has 32KB L1 ICache and 32K L1 DCache • Dual-core Arm® Cortex®

GSM/GPRS Digital Baseband Processor

GENERAL DESCRIPTION The AD6526 is the second device, after the AD6522, of the Analog Devices AD20msp430 series of SoftFone® GSM Baseband Processors. The AD6526 provides a competitive solution for GSM/GPRS terminal designs. It is designed to be fully integrated, easy to use, and compatible with GS

8-A 5-V/3.3-V Input Adjustable ISR with Short-Circuit protection

文件：193.42 Kbytes Page：8 Pages

8-A 5-V/3.3-V Input Adjustable ISR with Short-Circuit protection

文件：222.39 Kbytes Page：12 Pages

CHOPPER-TYPE BIPOLAR STEPPING MOTOR CONTROL DRIVER IC

文件：546.92 Kbytes Page：16 Pages

CHOPPER-TYPE BIPOLAR STEPPING MOTOR CONTROL DRIVER IC

文件：546.92 Kbytes Page：16 Pages