AM64x Sitara™ Processors

1 Features Processor cores: • 1× Dual 64-bit Arm® Cortex®-A53 microprocessor subsystem at up to 1.0 GHz – Dual-core Cortex-A53 cluster with 256KB L2 shared cache with SECDED ECC – Each A53 Core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection • Up to 2× Dual-co

AM64x Sitara™ Processors

1 Features Processor cores: • 1× Dual 64-bit Arm® Cortex®-A53 microprocessor subsystem at up to 1.0 GHz – Dual-core Cortex-A53 cluster with 256KB L2 shared cache with SECDED ECC – Each A53 Core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection • Up to 2× Dual-co

AM64x Sitara™ Processors

1 Features Processor cores: • 1× Dual 64-bit Arm® Cortex®-A53 microprocessor subsystem at up to 1.0 GHz – Dual-core Cortex-A53 cluster with 256KB L2 shared cache with SECDED ECC – Each A53 Core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection • Up to 2× Dual-co

AM64x Sitara™ Processors

1 Features Processor cores: • 1× Dual 64-bit Arm® Cortex®-A53 microprocessor subsystem at up to 1.0GHz – Dual-core Cortex-A53 cluster with 256KB L2 shared cache with SECDED ECC – Each A53 Core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection • Up to 2× Dual-cor

AM64x Sitara Processors

文件：5.00627 Mbytes Page：237 Pages

AM64x Sitara??Processors

文件：5.77773 Mbytes Page：235 Pages

AM64x Sitara™ Processors

1 Features Processor cores: • 1× Dual 64-bit Arm® Cortex®-A53 microprocessor subsystem at up to 1.0 GHz – Dual-core Cortex-A53 cluster with 256KB L2 shared cache with SECDED ECC – Each A53 Core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection • Up to 2× Dual-co

AM64x Sitara™ Processors

1 Features Processor cores: • 1× Dual 64-bit Arm® Cortex®-A53 microprocessor subsystem at up to 1.0 GHz – Dual-core Cortex-A53 cluster with 256KB L2 shared cache with SECDED ECC – Each A53 Core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection • Up to 2× Dual-co

AM64x Sitara™ Processors

1 Features Processor cores: • 1× Dual 64-bit Arm® Cortex®-A53 microprocessor subsystem at up to 1.0 GHz – Dual-core Cortex-A53 cluster with 256KB L2 shared cache with SECDED ECC – Each A53 Core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection • Up to 2× Dual-co

AM64x Sitara™ Processors

1 Features Processor cores: • 1× Dual 64-bit Arm® Cortex®-A53 microprocessor subsystem at up to 1.0 GHz – Dual-core Cortex-A53 cluster with 256KB L2 shared cache with SECDED ECC – Each A53 Core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection • Up to 2× Dual-co

AM64x Sitara™ Processors

1 Features Processor cores: • 1× Dual 64-bit Arm® Cortex®-A53 microprocessor subsystem at up to 1.0GHz – Dual-core Cortex-A53 cluster with 256KB L2 shared cache with SECDED ECC – Each A53 Core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection • Up to 2× Dual-cor

AM64x Sitara™ Processors

1 Features Processor cores: • 1× Dual 64-bit Arm® Cortex®-A53 microprocessor subsystem at up to 1.0GHz – Dual-core Cortex-A53 cluster with 256KB L2 shared cache with SECDED ECC – Each A53 Core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection • Up to 2× Dual-cor

AM64x Sitara™ Processors

1 Features Processor cores: • 1× Dual 64-bit Arm® Cortex®-A53 microprocessor subsystem at up to 1.0 GHz – Dual-core Cortex-A53 cluster with 256KB L2 shared cache with SECDED ECC – Each A53 Core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection • Up to 2× Dual-co

AM64x Sitara™ Processors

1 Features Processor cores: • 1× Dual 64-bit Arm® Cortex®-A53 microprocessor subsystem at up to 1.0 GHz – Dual-core Cortex-A53 cluster with 256KB L2 shared cache with SECDED ECC – Each A53 Core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection • Up to 2× Dual-co

AM64x Sitara™ Processors

1 Features Processor cores: • 1× Dual 64-bit Arm® Cortex®-A53 microprocessor subsystem at up to 1.0 GHz – Dual-core Cortex-A53 cluster with 256KB L2 shared cache with SECDED ECC – Each A53 Core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection • Up to 2× Dual-co

AM64x Sitara™ Processors

1 Features Processor cores: • 1× Dual 64-bit Arm® Cortex®-A53 microprocessor subsystem at up to 1.0GHz – Dual-core Cortex-A53 cluster with 256KB L2 shared cache with SECDED ECC – Each A53 Core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection • Up to 2× Dual-cor

P-Channel 20-V (D-S) MOSFET

P-Channel 20-V (D-S) MOSFET These miniature surface mount MOSFETs utilize a high cell density trench process to provide low rDS(on) and to ensure minimal power loss and heat dissipation. Typical applications are DC-DC converters and power management in portable and battery-powered products such a

AM64x Sitara Processors

文件：5.00627 Mbytes Page：237 Pages

AM64x Sitara??Processors

文件：5.77773 Mbytes Page：235 Pages

AM64x Sitara??Processors

文件：5.77773 Mbytes Page：235 Pages

DECT RF Transceiver

DESCRIPTION The AD6411 provides the complete transmit and receive RF signal processing necessary to implement a digital wireless transceiver based on the Digital Enhanced Cordless Telecommunications (DECT) standard. FEATURES Fully Compliant with DECT Specifications Single IC DECT Radio

DECT RF Transceiver

DESCRIPTION The AD6411 provides the complete transmit and receive RF signal processing necessary to implement a digital wireless transceiver based on the Digital Enhanced Cordless Telecommunications (DECT) standard. FEATURES Fully Compliant with DECT Specifications Single IC DECT Radio

AC Output Buffered Modules

文件：53.76 Kbytes Page：2 Pages

Back Probe Pin

文件：117.09 Kbytes Page：2 Pages

Quad-Channel Isolators with Integrated DC-to-DC Converters

文件：874.96 Kbytes Page：29 Pages