EVALUATION BOARD REV.D FOR AK4527B

GENERAL DESCRIPTION The AK4527B is a single chip CODEC that includes two channels of ADC and six channels of DAC. The ADC outputs 24bit data and the DAC accepts up to 24bit input data. The ADC has the Enhanced Dual Bit architecture with wide dynamic range. The DAC introduces the new developed A

HIGH PERFORMANCE MULTI-CHANNEL AUDIO CODEC

GENERAL DESCRIPTION The AK4527B is a single chip CODEC that includes two channels of ADC and six channels of DAC. The ADC outputs 24bit data and the DAC accepts up to 24bit input data. The ADC has the Enhanced Dual Bit architecture with wide dynamic range. The DAC introduces the new developed A

High Performance Multi-channel Audio CODEC

GENERAL DESCRIPTION\nThe AK4527B is a single chip CODEC that includes two channels of ADC and six channels of DAC. The ADC outputs 24bit data and the DAC accepts up to 24bit input data. The ADC has the Enhanced Dual Bit architecture with wide dynamic range. The DAC introduces the new developed Advan o 2ch 24bit ADC\n- 64x Oversampling\n- Sampling Rate up to 96kHz\n- Linear Phase Digital Anti-Alias Filter\n- Differential Inputs with single-ended use capability\n- S/(N+D): 92dB\n- Dynamic Range, S/N: 102dB\n- Digital HPF for offset cancellation\n- I/F format: MSB justified or I2S\n- Overflow flag;

Evaluation board Rev.D for AK4527B

BCD RATE MULTIPLEXER

DESCRIPTION The HCC4527B (extended temperature range) and HCF4527B (intermediate temperature range) are monolithic integrated circuit, available in 16-lead dual in line plastic or ceramic package. ■ CASCADABLE IN MULTIPLES OF 4-BITS ■ SET TO 9 INPUT AND 9 DETECT OUTPUT ■ QUIESCENT CURRENT SPEC

BCD rate multiplier

DESCRIPTION The HEF4527B is a BCD rate multiplier with two buffered rate outputs (O1 and O1), two buffered terminal count outputs (TC and TC), four BCD rate select inputs (SA, SB, SC, SD), a common clock input (CP), a preset input (PL), an overriding asynchronous clear input (CL), a strobe input

BCD rate multiplier

DESCRIPTION The HEF4527B is a BCD rate multiplier with two buffered rate outputs (O1 and O1), two buffered terminal count outputs (TC and TC), four BCD rate select inputs (SA, SB, SC, SD), a common clock input (CP), a preset input (PL), an overriding asynchronous clear input (CL), a strobe input

BCD rate multiplier

DESCRIPTION The HEF4527B is a BCD rate multiplier with two buffered rate outputs (O1 and O1), two buffered terminal count outputs (TC and TC), four BCD rate select inputs (SA, SB, SC, SD), a common clock input (CP), a preset input (PL), an overriding asynchronous clear input (CL), a strobe input

BCD rate multiplier

DESCRIPTION The HEF4527B is a BCD rate multiplier with two buffered rate outputs (O1 and O1), two buffered terminal count outputs (TC and TC), four BCD rate select inputs (SA, SB, SC, SD), a common clock input (CP), a preset input (PL), an overriding asynchronous clear input (CL), a strobe input