0.5 Ω RON, ±15 V, 12 V, ±5 V, 5 V/–12 V, Quad SPST Switch

FEATURES ► Low RON 0.5 Ω ► High continuous current of up to 847 mA ► Flat RON across signal range, 0.003 Ω ► THD of –122 dB at 1 kHz ► Improved balance between on resistance and on capacitance ► Low RON (0.5 Ω) and CON (28 pF) ► 1.8 V, 3.3 V, and 5 V Logic compatibility ► 16-lead, 4 mm x 4

0.5 Ω RON, ±20 V, 36 V, Quad SPST Switch

FEATURES ► Low RON 0.5 Ω ► High continuous current of up to 847 mA ► Flat RON across signal range, 0.003 Ω ► THD of –127 dB at 1 kHz ► Improved balance between on resistance and on capacitance ► Low RON (0.5 Ω) and CON (25 pF) ► 1.8 V, 3.3 V, and 5 V Logic compatibility ► 16-lead, 4 mm x 4

-28 V、 −200 mA、,低噪声、线性稳压器

ADP7182是一款CMOS、低压差(LDO)线性稳压器，采用-2.7 V至-28 V电源供电，最大输出电流为−200 mA。这款高输入电压LDO适用于调节-27 V至-1.2 V供电的高性能模拟和混合信号电路。该器件采用先进的专有架构，提供高电源抑制、低噪声特性，仅需一个2.2 μF小型陶瓷输出电容，便可实现出色的线路与负载瞬态响应性能。\n\n ADP7182提供固定输出电压选项和可调输出型号，可通过外置反馈分压器，将输出电压调节至-1.22 V至−VIN + VDO。 \n\n 现有库存提供下列固定输出电压选项：−5 V (3 mm × 3 mm LFCSP)、−1. • 低噪声：18 μV rms\n\n• 电源抑制比(PSRR)：66 dB（10 kHz，VOUT= −3 V）\n\n• 正负使能逻辑\n\n• 使用小型2.2μF陶瓷输出电容保持稳定 \n\n• 输入电压范围：-2.7 V至-28 V\n\n• 最大输出电流：-200 mA\n\n• 低压差：185 mV（在-200 mA负载下） \n\n• 初始精度：±1%\n\n• 线路、负载和温度范围内的精度\n• +2%最大值/−3%最小值\n\n\n\n\n• 低静态电流，IGND= −650 μA（−200 mA负载）\n\n• 低关断电流：−2 μA\n\n• 可调;

??8 V, ??00 mA, Low Noise, Linear Regulator

文件：768.36 Kbytes Page：28 Pages

Positive or negative enable logic

文件：995.85 Kbytes Page：31 Pages

Positive or negative enable logic

文件：995.85 Kbytes Page：31 Pages

??8 V, ??00 mA, Low Noise, Linear Regulator

文件：768.36 Kbytes Page：28 Pages

封装/外壳：8-WFDFN 裸露焊盘，CSP 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC REG LINEAR -5V 200MA 8LFCSP 集成电路（IC） 线性 + 开关稳压器

封装/外壳：6-UDFN 裸露焊盘，CSP 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC REG LINEAR -1.2V 200MA 6LFCSP 集成电路（IC） 稳压器 - 线性

Positive or negative enable logic

文件：995.85 Kbytes Page：31 Pages

Positive or negative enable logic

文件：995.85 Kbytes Page：31 Pages

Positive or negative enable logic

文件：995.85 Kbytes Page：31 Pages

Positive or negative enable logic

文件：995.85 Kbytes Page：31 Pages

Positive or negative enable logic

文件：995.85 Kbytes Page：31 Pages

Positive or negative enable logic

文件：995.85 Kbytes Page：31 Pages

??8 V, ??00 mA, Low Noise, Linear Regulator

文件：768.36 Kbytes Page：28 Pages

Positive or negative enable logic

文件：995.85 Kbytes Page：31 Pages

Positive or negative enable logic

文件：995.85 Kbytes Page：31 Pages

Positive or negative enable logic

文件：995.85 Kbytes Page：31 Pages

Positive or negative enable logic

文件：995.85 Kbytes Page：31 Pages

Positive or negative enable logic

文件：995.85 Kbytes Page：31 Pages

Positive or negative enable logic

文件：995.85 Kbytes Page：31 Pages

Positive or negative enable logic

文件：995.85 Kbytes Page：31 Pages

??8 V, ??00 mA, Low Noise, Linear Regulator

文件：768.36 Kbytes Page：28 Pages

Positive or negative enable logic

文件：995.85 Kbytes Page：31 Pages

18 dB GAIN 750/860/1000 MHz 110/128/152 CHANNEL CATV AMPLIFIERS

The MHW7182, MHW8182, and MHW9182 are designed specifically for up to 1000 MHz CATV systems as output amplifiers in trunk and line extender applications. These amplifiers feature ion–implanted, arsenic emitter transistors and an all gold metallization system • Specified for 110/128/152–Channel Pe

110-Channel 750 MHz CATV Amplifier

The RF Line 110-Channel 750 MHz CATV Amplifier • Specified for 77 and 110–Channel Performance • Broadband Power Gain - @ f = 750 MHz Gp = 18.8 dB (Typ) • Broadband Noise Figure NF = 5.0 dB (Typ) @ 750 MHz • All Gold Metallization • 7 GHz fT Ion–Implanted Transistors • Improved Rug

Digital Video Encoder EURO-DENC2

GENERAL DESCRIPTION The SAA7182A; SAA7183A encodes digital YUV video data to an NTSC, PAL, SECAM CVBS or S-Video signal and also RGB. Optionally, the YUV to RGB dematrix can be by-passed providing the digital-to-analog converted Cb, Y, Cr signals instead of RGB. FEATURES • Monolithic CMOS 3.3

Digital Video Encoder EURO-DENC2

FEATURES • CMOS circuit to enhance video data and to convert luminance and colour-difference signals from digital-to-analog • Digital Colour Transient Improvement block (DCTI) to increase the sharpness of colour transitions. The improved pin-compatible SAA7165 can supersede the SAA9065 • 16-bit

Digital Video Encoder EURO-DENC

GENERAL DESCRIPTION The SAA7182; SAA7183 encodes digital YUV video data to an NTSC, PAL, SECAM CVBS or S-Video signal and also RGB. The circuit accepts CCIR compatible YUV data with 720 active pixels per line in 4 : 2 : 2 multiplexed formats, for example MPEG decoded data. It includes a sync/clo