622 Mbps Clock and Data Recovery IC with Integrated Limiting Amplifier

FEATURES Exceeds SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 3.3 mV typical Adjustable slice level: ±95 mV Patented clock recovery architecture Loss-of-signal (LOS) detect range: 2.6 mV to 18.4 mV Independent slice level adjust and LOS detector No ref

622 Mbps Clock and Data Recovery IC with Integrated Limiting Amplifier

GENERAL DESCRIPTION The ADN2804 provides the receiver functions of quantization, signal level detect, clock and data recovery, and data retiming for 622 Mbps NRZ data. The ADN2804 automatically locks to 622 Mbps data without the need for an external reference clock or programming. All SONET jitte

封装/外壳：32-WFQFN 裸露焊盘，CSP 包装：卷带（TR） 描述：IC CLK/DATA REC 622MBPS 32-LFCSP 集成电路（IC） 应用特定时钟/定时

622 Mbps Clock and Data Recovery IC with Integrated Limiting Amplifier

GENERAL DESCRIPTION The ADN2804 provides the receiver functions of quantization, signal level detect, clock and data recovery, and data retiming for 622 Mbps NRZ data. The ADN2804 automatically locks to 622 Mbps data without the need for an external reference clock or programming. All SONET jitte

622 Mbps Clock and Data Recovery IC with Integrated Limiting Amplifier

FEATURES Exceeds SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 3.3 mV typical Adjustable slice level: ±95 mV Patented clock recovery architecture Loss-of-signal (LOS) detect range: 2.6 mV to 18.4 mV Independent slice level adjust and LOS detector No ref

622 Mbps Clock and Data Recovery IC with Integrated Limiting Amplifier

FEATURES Exceeds SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 3.3 mV typical Adjustable slice level: ±95 mV Patented clock recovery architecture Loss-of-signal (LOS) detect range: 2.6 mV to 18.4 mV Independent slice level adjust and LOS detector No ref

622 Mbps Clock and Data Recovery IC with Integrated Limiting Amplifier

GENERAL DESCRIPTION The ADN2804 provides the receiver functions of quantization, signal level detect, clock and data recovery, and data retiming for 622 Mbps NRZ data. The ADN2804 automatically locks to 622 Mbps data without the need for an external reference clock or programming. All SONET jitte

封装/外壳：32-WFQFN 裸露焊盘，CSP 包装：托盘 描述：IC CLK/DATA REC 622MBPS 32-LFCSP 集成电路（IC） 应用特定时钟/定时

OCTAL PERIPHERAL DRIVER ARRAYS

Octal High Voltage, High Current Darlington Transistor Arrays The eight NPN Darlington connected transistors in this family of arrays are ideally suited for interfacing between low logic level digital circuitry (such as TTL, CMOS or PMOS/NMOS) and the higher current/voltage requirements of lamps,

EIGHT DARLINGTON ARRAYS

Description The ULQ2801A-ULQ2804A each contain eight Darlington transistors with common emitters and integral suppression diodes for inductive loads. Each Darlington features a peak load current rating of 600 mA (500 mA continuous) and can withstand at least 50 V in the off state. Outputs may be

Low-Power BiCMOS Current-Mode PWM

文件：383.98 Kbytes Page：20 Pages

Low-Power BiCMOS Current-Mode PWM

文件：383.98 Kbytes Page：20 Pages

Low-Power BiCMOS Current-Mode PWM

文件：383.98 Kbytes Page：20 Pages