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ADN晶体管资料
ADN别名:ADN三极管、ADN晶体管、ADN晶体三极管
ADN生产厂家:未知生产厂家1
ADN制作材料:Si-NPN
ADN性质:射频/高频放大 (HF)
ADN封装形式:贴片封装
ADN极限工作电压:20V
ADN最大电流允许值:0.05A
ADN最大工作频率:1.4GHZ
ADN引脚数:3
ADN最大耗散功率:0.15W
ADN放大倍数:
ADN图片代号:H-15
ADNvtest:20
ADNhtest:1400000000
- ADNatest:0.05
ADNwtest:0.15
ADN代换 ADN用什么型号代替:2SC3838K,
ADN价格
参考价格:¥1806.1590
型号:ADN10-24-1PM-C 品牌:Emerson 备注:这里有ADN多少钱,2025年最近7天走势,今日出价,今日竞价,ADN批发/采购报价,ADN行情走势销售排行榜,ADN报价。型号 | 功能描述 | 生产厂家&企业 | LOGO | 操作 |
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ADN | Adjusable Voltage 文件:730.62 Kbytes Page:3 Pages | Astec | ||
ADN | Limit Alarms (potentiometer adj.) A-UNIT 文件:126.69 Kbytes Page:4 Pages | MSYSTEM 爱模 | ||
11.3 Gbps Active Back-Termination, Differential Laser Diode Driver GENERAL DESCRIPTION The ADN2526 laser diode driver is designed for direct modulation of packaged laser diodes that have a differential resistance ranging from 5 Ω to 50 Ω. The active back-termination in the ADN2526 absorbs signal reflections from the TOSA end of the output transmission lines, ena | AD 亚德诺 | |||
11.3 Gbps Active Back-Termination, Differential Laser Diode Driver GENERAL DESCRIPTION The ADN2526 laser diode driver is designed for direct modulation of packaged laser diodes that have a differential resistance ranging from 5 Ω to 50 Ω. The active back-termination in the ADN2526 absorbs signal reflections from the TOSA end of the output transmission lines, ena | AD 亚德诺 | |||
11.3 Gbps Active Back-Termination, Differential Laser Diode Driver GENERAL DESCRIPTION The ADN2526 laser diode driver is designed for direct modulation of packaged laser diodes that have a differential resistance ranging from 5 Ω to 50 Ω. The active back-termination in the ADN2526 absorbs signal reflections from the TOSA end of the output transmission lines, ena | AD 亚德诺 | |||
11.3 Gbps Active Back-Termination, Differential Laser Diode Driver GENERAL DESCRIPTION The ADN2526 laser diode driver is designed for direct modulation of packaged laser diodes that have a differential resistance ranging from 5 Ω to 50 Ω. The active back-termination in the ADN2526 absorbs signal reflections from the TOSA end of the output transmission lines, ena | AD 亚德诺 | |||
11.3 Gbps, Active Back-Termination, Differential Laser Diode Driver GENERAL DESCRIPTION The ADN2531 laser diode driver can work with directly modulated laser diodes, including vertical-cavity surface-emitting laser (VCSEL), Fabry-Perot (FP) lasers, and distributed feedback (DFB) lasers, with a differential loading resistance ranging from 5 Ω to 140 Ω. The active | AD 亚德诺 | |||
11.3 Gbps, Active Back-Termination, Differential Laser Diode Driver GENERAL DESCRIPTION The ADN2531 laser diode driver can work with directly modulated laser diodes, including vertical-cavity surface-emitting laser (VCSEL), Fabry-Perot (FP) lasers, and distributed feedback (DFB) lasers, with a differential loading resistance ranging from 5 Ω to 140 Ω. The active | AD 亚德诺 | |||
11.3 Gbps, Active Back-Termination, Differential Laser Diode Driver GENERAL DESCRIPTION The ADN2531 laser diode driver can work with directly modulated laser diodes, including vertical-cavity surface-emitting laser (VCSEL), Fabry-Perot (FP) lasers, and distributed feedback (DFB) lasers, with a differential loading resistance ranging from 5 Ω to 140 Ω. The active | AD 亚德诺 | |||
11.3 Gbps, Active Back-Termination, Differential Laser Diode Driver GENERAL DESCRIPTION The ADN2531 laser diode driver can work with directly modulated laser diodes, including vertical-cavity surface-emitting laser (VCSEL), Fabry-Perot (FP) lasers, and distributed feedback (DFB) lasers, with a differential loading resistance ranging from 5 Ω to 140 Ω. The active | AD 亚德诺 | |||
622 Mbps Clock and Data Recovery IC with Integrated Limiting Amplifier GENERAL DESCRIPTION The ADN2804 provides the receiver functions of quantization, signal level detect, clock and data recovery, and data retiming for 622 Mbps NRZ data. The ADN2804 automatically locks to 622 Mbps data without the need for an external reference clock or programming. All SONET jitte | AD 亚德诺 | |||
622 Mbps Clock and Data Recovery IC with Integrated Limiting Amplifier FEATURES Exceeds SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 3.3 mV typical Adjustable slice level: ±95 mV Patented clock recovery architecture Loss-of-signal (LOS) detect range: 2.6 mV to 18.4 mV Independent slice level adjust and LOS detector No ref | AD 亚德诺 | |||
622 Mbps Clock and Data Recovery IC with Integrated Limiting Amplifier FEATURES Exceeds SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 3.3 mV typical Adjustable slice level: ±95 mV Patented clock recovery architecture Loss-of-signal (LOS) detect range: 2.6 mV to 18.4 mV Independent slice level adjust and LOS detector No ref | AD 亚德诺 | |||
622 Mbps Clock and Data Recovery IC with Integrated Limiting Amplifier GENERAL DESCRIPTION The ADN2804 provides the receiver functions of quantization, signal level detect, clock and data recovery, and data retiming for 622 Mbps NRZ data. The ADN2804 automatically locks to 622 Mbps data without the need for an external reference clock or programming. All SONET jitte | AD 亚德诺 | |||
622 Mbps Clock and Data Recovery IC with Integrated Limiting Amplifier FEATURES Exceeds SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 3.3 mV typical Adjustable slice level: ±95 mV Patented clock recovery architecture Loss-of-signal (LOS) detect range: 2.6 mV to 18.4 mV Independent slice level adjust and LOS detector No ref | AD 亚德诺 | |||
622 Mbps Clock and Data Recovery IC with Integrated Limiting Amplifier GENERAL DESCRIPTION The ADN2804 provides the receiver functions of quantization, signal level detect, clock and data recovery, and data retiming for 622 Mbps NRZ data. The ADN2804 automatically locks to 622 Mbps data without the need for an external reference clock or programming. All SONET jitte | AD 亚德诺 | |||
622 Mbps Clock and Data Recovery IC with Integrated Limiting Amplifier FEATURES Exceeds SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 3.3 mV typical Adjustable slice level: ±95 mV Patented clock recovery architecture Loss-of-signal (LOS) detect range: 2.6 mV to 18.4 mV Independent slice level adjust and LOS detector No ref | AD 亚德诺 | |||
622 Mbps Clock and Data Recovery IC with Integrated Limiting Amplifier GENERAL DESCRIPTION The ADN2804 provides the receiver functions of quantization, signal level detect, clock and data recovery, and data retiming for 622 Mbps NRZ data. The ADN2804 automatically locks to 622 Mbps data without the need for an external reference clock or programming. All SONET jitte | AD 亚德诺 | |||
622 Mbps Clock and Data Recovery IC with Integrated Limiting Amplifier FEATURES Exceeds SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 3.3 mV typical Adjustable slice level: ±95 mV Patented clock recovery architecture Loss-of-signal (LOS) detect range: 2.6 mV to 18.4 mV Independent slice level adjust and LOS detector No ref | AD 亚德诺 | |||
1.25 Gbps Clock and Data Recovery IC GENERAL DESCRIPTION The ADN2805 provides the receiver functions of quantization and clock and data recovery for 1.25 Gbps. The ADN2805 automatically locks to all data rates without the need for an external reference clock or programming. All SONET jitter requirements are met, including jitter tra | AD 亚德诺 | |||
1.25 Gbps Clock and Data Recovery IC GENERAL DESCRIPTION The ADN2805 provides the receiver functions of quantization and clock and data recovery for 1.25 Gbps. The ADN2805 automatically locks to all data rates without the need for an external reference clock or programming. All SONET jitter requirements are met, including jitter tra | AD 亚德诺 | |||
1.25 Gbps Clock and Data Recovery IC GENERAL DESCRIPTION The ADN2805 provides the receiver functions of quantization and clock and data recovery for 1.25 Gbps. The ADN2805 automatically locks to all data rates without the need for an external reference clock or programming. All SONET jitter requirements are met, including jitter tra | AD 亚德诺 | |||
1.25 Gbps Clock and Data Recovery IC GENERAL DESCRIPTION The ADN2805 provides the receiver functions of quantization and clock and data recovery for 1.25 Gbps. The ADN2805 automatically locks to all data rates without the need for an external reference clock or programming. All SONET jitter requirements are met, including jitter tra | AD 亚德诺 | |||
622 Mbps Clock and Data Recovery IC GENERAL DESCRIPTION The ADN2806 provides the receiver functions for clock and data recovery, and data retiming for 622 Mbps NRZ data. The ADN2806 automatically locks to 622 Mbps data without the need for an external reference clock or programming. All SONET jitter requirements are met, including | AD 亚德诺 | |||
622 Mbps Clock and Data Recovery IC FEATURES Exceeds SONET requirements for jitter transfer/ generation/tolerance Patented clock recovery architecture No reference clock required Loss-of-lock indicator I2C® interface to access optional features Single-supply operation: 3.3 V Low power: 359 mW typical 5 mm × 5 mm, 32-lead LFC | AD 亚德诺 | |||
622 Mbps Clock and Data Recovery IC FEATURES Exceeds SONET requirements for jitter transfer/ generation/tolerance Patented clock recovery architecture No reference clock required Loss-of-lock indicator I2C® interface to access optional features Single-supply operation: 3.3 V Low power: 359 mW typical 5 mm × 5 mm, 32-lead LFC | AD 亚德诺 | |||
622 Mbps Clock and Data Recovery IC GENERAL DESCRIPTION The ADN2806 provides the receiver functions for clock and data recovery, and data retiming for 622 Mbps NRZ data. The ADN2806 automatically locks to 622 Mbps data without the need for an external reference clock or programming. All SONET jitter requirements are met, including | AD 亚德诺 | |||
622 Mbps Clock and Data Recovery IC FEATURES Exceeds SONET requirements for jitter transfer/ generation/tolerance Patented clock recovery architecture No reference clock required Loss-of-lock indicator I2C® interface to access optional features Single-supply operation: 3.3 V Low power: 359 mW typical 5 mm × 5 mm, 32-lead LFC | AD 亚德诺 | |||
622 Mbps Clock and Data Recovery IC GENERAL DESCRIPTION The ADN2806 provides the receiver functions for clock and data recovery, and data retiming for 622 Mbps NRZ data. The ADN2806 automatically locks to 622 Mbps data without the need for an external reference clock or programming. All SONET jitter requirements are met, including | AD 亚德诺 | |||
622 Mbps Clock and Data Recovery IC FEATURES Exceeds SONET requirements for jitter transfer/ generation/tolerance Patented clock recovery architecture No reference clock required Loss-of-lock indicator I2C® interface to access optional features Single-supply operation: 3.3 V Low power: 359 mW typical 5 mm × 5 mm, 32-lead LFC | AD 亚德诺 | |||
622 Mbps Clock and Data Recovery IC GENERAL DESCRIPTION The ADN2806 provides the receiver functions for clock and data recovery, and data retiming for 622 Mbps NRZ data. The ADN2806 automatically locks to 622 Mbps data without the need for an external reference clock or programming. All SONET jitter requirements are met, including | AD 亚德诺 | |||
622 Mbps Clock and Data Recovery IC FEATURES Exceeds SONET requirements for jitter transfer/ generation/tolerance Patented clock recovery architecture No reference clock required Loss-of-lock indicator I2C® interface to access optional features Single-supply operation: 3.3 V Low power: 359 mW typical 5 mm × 5 mm, 32-lead LFC | AD 亚德诺 | |||
155/622 Mb/s Clock and Data Recovery IC with Integrated Limiting Amp GENERAL DESCRIPTION The ADN2807 provides the receiver functions of quantization, signal level detect, and clock and data recovery at rates of OC-3, OC-12, and 15/14 FEC. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications a | AD 亚德诺 | |||
155/622 Mb/s Clock and Data Recovery IC with Integrated Limiting Amplifier FEATURES Meets SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 4 mV typical Adjustable slice level: ±100 mV Patented clock recovery architecture Loss-of-signal detect range: 3 mV to 15 mV Single-reference clock frequency for all rates, including 15/14 (7 | AD 亚德诺 | |||
155/622 Mb/s Clock and Data Recovery IC with Integrated Limiting Amplifier FEATURES Meets SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 4 mV typical Adjustable slice level: ±100 mV Patented clock recovery architecture Loss-of-signal detect range: 3 mV to 15 mV Single-reference clock frequency for all rates, including 15/14 (7 | AD 亚德诺 | |||
155/622 Mb/s Clock and Data Recovery IC with Integrated Limiting Amp GENERAL DESCRIPTION The ADN2807 provides the receiver functions of quantization, signal level detect, and clock and data recovery at rates of OC-3, OC-12, and 15/14 FEC. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications a | AD 亚德诺 | |||
155/622 Mb/s Clock and Data Recovery IC with Integrated Limiting Amp GENERAL DESCRIPTION The ADN2807 provides the receiver functions of quantization, signal level detect, and clock and data recovery at rates of OC-3, OC-12, and 15/14 FEC. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications a | AD 亚德诺 | |||
155/622 Mb/s Clock and Data Recovery IC with Integrated Limiting Amplifier FEATURES Meets SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 4 mV typical Adjustable slice level: ±100 mV Patented clock recovery architecture Loss-of-signal detect range: 3 mV to 15 mV Single-reference clock frequency for all rates, including 15/14 (7 | AD 亚德诺 | |||
155/622 Mb/s Clock and Data Recovery IC with Integrated Limiting Amplifier FEATURES Meets SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 4 mV typical Adjustable slice level: ±100 mV Patented clock recovery architecture Loss-of-signal detect range: 3 mV to 15 mV Single-reference clock frequency for all rates, including 15/14 (7 | AD 亚德诺 | |||
Multi-Rate to 2.7Gbps Clock and Data Recovery IC with Limiting Amplifier PRODUCT DESCRIPTION The ADN2809 provides the receiver functions of Quantization, Signal Level Detect and Clock and Data Recovery at rates of OC-3, OC-12, Gigabit Ethernet, OC-48 and all FEC rates. All SONET jitter requirements are met, including: Jitter Transfer; Jitter Generation; and Jitter Tol | AD 亚德诺 | |||
Multi-Rate to 2.7Gbps Clock and Data Recovery IC with Limiting Amplifier PRODUCT DESCRIPTION The ADN2809 provides the receiver functions of Quantization, Signal Level Detect and Clock and Data Recovery at rates of OC-3, OC-12, Gigabit Ethernet, OC-48 and all FEC rates. All SONET jitter requirements are met, including: Jitter Transfer; Jitter Generation; and Jitter Tol | AD 亚德诺 | |||
Multi-Rate to 2.7Gbps Clock and Data Recovery IC with Limiting Amplifier PRODUCT DESCRIPTION The ADN2809 provides the receiver functions of Quantization, Signal Level Detect and Clock and Data Recovery at rates of OC-3, OC-12, Gigabit Ethernet, OC-48 and all FEC rates. All SONET jitter requirements are met, including: Jitter Transfer; Jitter Generation; and Jitter Tol | AD 亚德诺 | |||
OC-48/OC-48 FEC Clock and Data Recovery IC with Integrated Limiting Amp PRODUCT DESCRIPTION The ADN2811 provides the receiver functions of quantization, signal level detect, and clock and data recovery at OC-48 and OC-48 FEC rates. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted | AD 亚德诺 | |||
OC-48/OC-48 FEC Clock and Data Recovery FEATURES Meets SONET requirements for jitter transfer/generation/ tolerance Quantizer sensitivity: 4 mV typical Adjustable slice level: ±100 mV 1.9 GHz minimum bandwidth Patented clock recovery architecture Loss of signal detect range: 3 mV to 15 mV Single reference clock frequency for both nati | AD 亚德诺 | |||
OC-48/OC-48 FEC Clock and Data Recovery FEATURES Meets SONET requirements for jitter transfer/generation/ tolerance Quantizer sensitivity: 4 mV typical Adjustable slice level: ±100 mV 1.9 GHz minimum bandwidth Patented clock recovery architecture Loss of signal detect range: 3 mV to 15 mV Single reference clock frequency for both nati | AD 亚德诺 | |||
OC-48/OC-48 FEC Clock and Data Recovery IC with Integrated Limiting Amp PRODUCT DESCRIPTION The ADN2811 provides the receiver functions of quantization, signal level detect, and clock and data recovery at OC-48 and OC-48 FEC rates. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted | AD 亚德诺 | |||
OC-48/OC-48 FEC Clock and Data Recovery IC with Integrated Limiting Amp PRODUCT DESCRIPTION The ADN2811 provides the receiver functions of quantization, signal level detect, and clock and data recovery at OC-48 and OC-48 FEC rates. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted | AD 亚德诺 | |||
OC-48/OC-48 FEC Clock and Data Recovery FEATURES Meets SONET requirements for jitter transfer/generation/ tolerance Quantizer sensitivity: 4 mV typical Adjustable slice level: ±100 mV 1.9 GHz minimum bandwidth Patented clock recovery architecture Loss of signal detect range: 3 mV to 15 mV Single reference clock frequency for both nati | AD 亚德诺 | |||
OC-48/OC-48 FEC Clock and Data Recovery FEATURES Meets SONET requirements for jitter transfer/generation/ tolerance Quantizer sensitivity: 4 mV typical Adjustable slice level: ±100 mV 1.9 GHz minimum bandwidth Patented clock recovery architecture Loss of signal detect range: 3 mV to 15 mV Single reference clock frequency for both nati | AD 亚德诺 | |||
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp GENERAL DESCRIPTION The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming | AD 亚德诺 | |||
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp FEATURES Serial data input: 12.3 Mb/s to 2.7 Gb/s Exceeds SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 6 mV typical Adjustable slice level: ±100 mV Patented clock recovery architecture Loss of signal (LOS) detect range: 3 mV to 15 mV Independent slice | AD 亚德诺 | |||
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp FEATURES Serial data input: 12.3 Mb/s to 2.7 Gb/s Exceeds SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 6 mV typical Adjustable slice level: ±100 mV Patented clock recovery architecture Loss of signal (LOS) detect range: 3 mV to 15 mV Independent slice | AD 亚德诺 | |||
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp GENERAL DESCRIPTION The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming | AD 亚德诺 | |||
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp GENERAL DESCRIPTION The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming | AD 亚德诺 | |||
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp GENERAL DESCRIPTION The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming | AD 亚德诺 | |||
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery GENERAL DESCRIPTION The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming | AD 亚德诺 | |||
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp FEATURES Serial data input: 12.3 Mb/s to 2.7 Gb/s Exceeds SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 6 mV typical Adjustable slice level: ±100 mV Patented clock recovery architecture Loss of signal (LOS) detect range: 3 mV to 15 mV Independent slice | AD 亚德诺 | |||
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery GENERAL DESCRIPTION The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming | AD 亚德诺 | |||
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp FEATURES Serial data input: 12.3 Mb/s to 2.7 Gb/s Exceeds SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 6 mV typical Adjustable slice level: ±100 mV Patented clock recovery architecture Loss of signal (LOS) detect range: 3 mV to 15 mV Independent slice | AD 亚德诺 | |||
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery GENERAL DESCRIPTION The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming | AD 亚德诺 |
ADN产品属性
- 类型
描述
- 型号
ADN
- 制造商
Sola/Hevi-Duty
IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
ADI/亚德诺 |
25+ |
WLCSP25 |
32000 |
ADI/亚德诺全新特价ADN8833ACBZ-R7即刻询购立享优惠#长期有货 |
|||
ADI(亚德诺) |
23+ |
NA |
27950 |
10年以上分销商,原装进口件,服务型企业 |
|||
ADI |
24+ |
WLCSP25 |
12000 |
原装正品 价格优势 |
|||
ADI/亚德诺 |
22+ |
66900 |
原封装 |
||||
ADI/亚德诺 |
23+ |
WLCSP25 |
12500 |
ADI原装现货欢迎查询库存变动长期可供应订货样品现货 |
|||
ADI/亚德诺 |
22+ |
SOP |
50000 |
原装现货支持实单价优/含税 |
|||
ADI |
24+ |
BGA |
540010 |
自己库存,有更多量 |
|||
ADI(亚德诺) |
24+ |
标准封装 |
18663 |
我们只是原厂的搬运工 |
|||
ADI/亚德诺 |
20+ |
SMD |
880000 |
明嘉莱只做原装正品现货 |
|||
ADI/亚德诺 |
23+ |
QFN |
5000 |
原厂授权代理,海外优势订货渠道。可提供大量库存,详 |
ADN规格书下载地址
ADN参数引脚图相关
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- amp连接器
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- altobeam
- aj1
- ADY24
- ADY23
- ADY22
- ADY21
- ADY20
- ADY19
- ADY16
- ADY15
- ADY14
- ADY13
- ADY12
- ADY11
- ADY10
- ads1115
- ADQ
- ADP672
- ADP671
- ADP670
- ADP666
- ADP665
- ADP
- ADN2821
- ADN2820
- ADN2819
- ADN2818
- ADN2817
- ADN2816
- ADN2815
- ADN2814
- ADN2813
- ADN2812
- ADN2811
- ADN2809
- ADN2807
- ADN2806
- ADN2805
- ADN2804
- ADN2531
- ADN2530
- ADN2526
- ADN2525
- ADMP521
- ADMP510
- ADMP504
- ADMP441
- ADMP421
- ADMP411
- ADMP405
- ADMP404
- ADMC401
- ADMC331
- ADMC330
- ADMC328
- ADMC326
- ADMC300
- ADMC201
- ADMC200
- ADM9690
- ADM9511
- ADM9264
- ADM9240
- ADM
- ADL
- ADG
- AD822
- AD821
- AD820
- AD818
- AD816A
- AD816
- AD815A
- AD815
- AD814A
- AD814
- AD813A
- AD813
- AD812A
- AD812
- AD811A
- AD811
- AD810A
ADN数据表相关新闻
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2020-12-18ADN2850-非易失性内存,双通道1024可编程电阻器的位置
ADN2850提供双通道,数字控制的可编程resistors2分辨率1024个职位。这些设备作为一个机械的执行相同的电子调节功能变阻器具有增强的分辨率,固态可靠性,出色的低温度系数性能。 ADN2850的通用编程允许通过一个标准的串行接口16模式的操作和调整,包括便笺簿编程,内存存储和检索,递增/递减,日志锥度调整,雨刮器设置回读,和额外的用户定义EEMEM1。的ADN2850的另一个主要特点是,实际公差存储在EEMEM。实际的全面的阻力因此被称为,这是宝贵的匹配容差和校准。在便笺簿中的编程模式,具体设置可以直接编程RDAC2寄存器,设置阻力W和B的终端之间的RDAC寄存器也可以载入以前存储在
2012-12-12
DdatasheetPDF页码索引
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