Multiservice Clock Generator

GENERAL DESCRIPTION The AD9551 accepts one or two reference input signals to synthesize one or two output signals. The AD9551 uses a fractional-N PLL that precisely translates the reference frequency to the desired output frequency. The input receivers and output drivers provide both single-ended

多业务时钟发生器

AD9551接受一个或两个参考输入信号，然后由这些信号产生一个或两个输出信号。这两个输出信号的频率为谐波相关的，可编程因子为1至63。AD9551能将参考频率转换成需要的输出频率。输入接收器和输出驱动器同时具备单端和差分工作模式。\n\n 参考调节和转换电路在内部使两个参考同步，以便一个参考失效时，输出端实际上不出现相位扰动现象。\n\n AD9551采用一个26 MHz外部晶体(标称值)和内部DCXO来提供保持模式工作。如果两个参考都失效了，该器件会维持一个稳定的输出信号。\n\n 小数N分频PLL可实现超精细的输出频率调谐精度。所有目前定义的网络标准(包括前向 • 任意两个标准网络速率之间转换\n\n• 双路参考输入和双路时钟输出\n\n• 引脚可编程(标准网络速率转换)\n\n• SPI可编程(任意合理速率转换)\n\n\n\n• 输出频率范围：10 MHz至777.6 MHz\n\n• 输入频率范围：19.44 MHz至806 MHz\n\n• 片上VCO\n\n• 欲了解更多特性，请参考数据手册;

Multiservice Clock Generator

GENERAL DESCRIPTION The AD9551 accepts one or two reference input signals to synthesize one or two output signals. The AD9551 uses a fractional-N PLL that precisely translates the reference frequency to the desired output frequency. The input receivers and output drivers provide both single-ended

Multiservice Clock Generator

GENERAL DESCRIPTION The AD9551 accepts one or two reference input signals to synthesize one or two output signals. The AD9551 uses a fractional-N PLL that precisely translates the reference frequency to the desired output frequency. The input receivers and output drivers provide both single-ended

Multiservice Clock Generator

GENERAL DESCRIPTION The AD9551 accepts one or two reference input signals to synthesize one or two output signals. The AD9551 uses a fractional-N PLL that precisely translates the reference frequency to the desired output frequency. The input receivers and output drivers provide both single-ended

Multiservice Clock Generator

GENERAL DESCRIPTION The AD9551 accepts one or two reference input signals to synthesize one or two output signals. The AD9551 uses a fractional-N PLL that precisely translates the reference frequency to the desired output frequency. The input receivers and output drivers provide both single-ended

功能：时钟发生器 包装：盒 描述：BOARD EVAL FOR AD9551 开发板，套件，编程器 评估和演示板及套件

封装/外壳：40-VFQFN 裸露焊盘，CSP 包装：卷带（TR） 描述：IC CLOCK GEN TRANSLATOR 40LFCSP 集成电路（IC） 时钟发生器，PLL，频率合成器

5V Input, 3A Output Current 3.3V, 2.5V 1.8V, 1.5V Output Switching Regulator Three Terminal Package

[Omnirel] DESCRIPTION The OM955X series of Switching Regulators are designed for pin compatibility with standard 3- Pin linear regulators. They are well suited for on-board, non- isolated power applications where efficient point- of- load regulation is needed. The package is designed using Chip-

8-bit I2C LED driver with programmable blink rates

DESCRIPTION The PCA9551 LED Blinker blinks LEDs in I2C-bus and SMBus applications where it is necessary to limit bus traffic or free up the I2 C Master’s (MCU, MPU, DSP, chipset, etc.) timer. The uniqueness of this device is the internal oscillator with two programmable blink rates. FEATUR

8-bit I2C LED driver with programmable blink rates

DESCRIPTION The PCA9551 LED Blinker blinks LEDs in I2C-bus and SMBus applications where it is necessary to limit bus traffic or free up the I2 C Master’s (MCU, MPU, DSP, chipset, etc.) timer. The uniqueness of this device is the internal oscillator with two programmable blink rates. FEATUR

8-bit I2C LED driver with programmable blink rates

DESCRIPTION The PCA9551 LED Blinker blinks LEDs in I2C-bus and SMBus applications where it is necessary to limit bus traffic or free up the I2 C Master’s (MCU, MPU, DSP, chipset, etc.) timer. The uniqueness of this device is the internal oscillator with two programmable blink rates. FEATUR

High-Current VCOM Drive Buffers for TFT LCDs

文件：823.85 Kbytes Page：12 Pages