Single Buffered Switch 3.2 Gbps

GENERAL DESCRIPTION The AD8153 is an asynchronous, protocol agnostic, single-lane 2:1 switch with three differential CML inputs and three differential CML outputs. The AD8159, another member of the Xstream line of products, is suitable for similar applications that require more than one lane. Th

3.2 Gbps Single Buffered Mux/Demux Switch

FEATURES Single lane 2:1 mux/1:2 demux 3.2 Gbps to dc data rates Compensates over 40 inches of FR4 at 3.2 Gbps through Two levels of input equalization, or Four levels of output pre-emphasis Operates with ac- or dc-coupled differential I/O Low deterministic jitter, typically 16 ps p-p Low ra

3.2 Gbps Single Buffered Mux/Demux Switch

文件：708.26 Kbytes Page：24 Pages

单通道3.2G 2:1复用/1:2解复用开关，提供输入均衡和输出预加重

3.2 Gbps Single Buffered Mux/Demux Switch

FEATURES Single lane 2:1 mux/1:2 demux 3.2 Gbps to dc data rates Compensates over 40 inches of FR4 at 3.2 Gbps through Two levels of input equalization, or Four levels of output pre-emphasis Operates with ac- or dc-coupled differential I/O Low deterministic jitter, typically 16 ps p-p Low ra

3.2 Gbps Single Buffered Mux/Demux Switch

FEATURES Single lane 2:1 mux/1:2 demux 3.2 Gbps to dc data rates Compensates over 40 inches of FR4 at 3.2 Gbps through Two levels of input equalization, or Four levels of output pre-emphasis Operates with ac- or dc-coupled differential I/O Low deterministic jitter, typically 16 ps p-p Low ra

3.2 Gbps Single Buffered Mux/Demux Switch

FEATURES Single lane 2:1 mux/1:2 demux 3.2 Gbps to dc data rates Compensates over 40 inches of FR4 at 3.2 Gbps through Two levels of input equalization, or Four levels of output pre-emphasis Operates with ac- or dc-coupled differential I/O Low deterministic jitter, typically 16 ps p-p Low ra

3.2 Gbps Single Buffered Mux/Demux Switch

FEATURES Single lane 2:1 mux/1:2 demux 3.2 Gbps to dc data rates Compensates over 40 inches of FR4 at 3.2 Gbps through Two levels of input equalization, or Four levels of output pre-emphasis Operates with ac- or dc-coupled differential I/O Low deterministic jitter, typically 16 ps p-p Low ra

3.2 Gbps Single Buffered Mux/Demux Switch

文件：708.26 Kbytes Page：24 Pages

Single Buffered Mux/Demux Switch

文件：1.42258 Mbytes Page：24 Pages

3.2 Gbps Single Buffered Mux/Demux Switch

文件：708.26 Kbytes Page：24 Pages

封装/外壳：32-WFQFN 裸露焊盘，CSP 包装：卷带（TR） 描述：IC MUX/DEMUX 1 X 2:1 32LFCSP 集成电路（IC） 信号开关，多路复用器，解码器

封装/外壳：32-WFQFN 裸露焊盘，CSP 包装：管件 描述：IC MUX/DEMUX 1 X 2:1 32LFCSP 集成电路（IC） 信号开关，多路复用器，解码器

3.2 Gbps Single Buffered Mux/Demux Switch

文件：708.26 Kbytes Page：24 Pages

3.2 Gbps Single Buffered Mux/Demux Switch

文件：708.26 Kbytes Page：24 Pages

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