625 kSPS, 24-Bit, 109 dB ADC With On-Chip Buffer

GENERAL DESCRIPTION The AD7762 is a high performance, 24-bit Σ-Δ analog-to digital converter (ADC). It combines wide input bandwidth and high speed with the benefits of Σ-Δ conversion with a performance of 106 dB SNR at 625 kSPS, making it ideal for high speed data acquisition. Wide dynamic ran

24-Bit, 8.5 mW, 109 dB, 128/64/32 kSPS ADCs

GENERAL DESCRIPTION The AD7767/AD7767-1/AD7767-2 are high performance 24-bit oversampled SAR analog-to-digital converters (ADC). The AD7767/AD7767-1/AD7767-2 combine the benefits of a large dynamic range and input bandwidth, consuming 15 mW, 10.5 mW, and 8.5 mW power, respectively, all containe

AD7760/AD7762 Evaluation Board using EVAL-CED1Z

FEATURES Full-featured evaluation board for the AD7760/AD7762 EVAL-CED1Z compatible On-board 4.096 V reference Crystal clock oscillator MCLK source PC software for control and data analysis for use with EVAL-CED1Z Filter Programmability – Load custom filter to AD7760/62 EVALUATION BOARD

24位、625 KSPS、109 DB Σ-Δ型ADC，内置片内缓冲

Sigma-Delta ADC With On-Chip Buffer

文件：619.72 Kbytes Page：29 Pages

24-Bit, 8.5 mW, 109 dB, 128 kSPS/64 kSPS/32 kSPS ADCs

FEATURES ► Oversampled successive approximation (SAR) architecture ► High performance ac and dc accuracy, low power ► 115.5 dB dynamic range, 32 kSPS (AD7767-2) ► 112.5 dB dynamic range, 64 kSPS (AD7767-1) ► 109.5 dB dynamic range, 128 kSPS (AD7767) ► −118 dB THD ► Exceptionally low power

625 kSPS, 24-Bit, 109 dB ADC With On-Chip Buffer

GENERAL DESCRIPTION The AD7762 is a high performance, 24-bit Σ-Δ analog-to digital converter (ADC). It combines wide input bandwidth and high speed with the benefits of Σ-Δ conversion with a performance of 106 dB SNR at 625 kSPS, making it ideal for high speed data acquisition. Wide dynamic ran

625 kSPS, 24-Bit, 109 dB ADC With On-Chip Buffer

GENERAL DESCRIPTION The AD7762 is a high performance, 24-bit Σ-Δ analog-to digital converter (ADC). It combines wide input bandwidth and high speed with the benefits of Σ-Δ conversion with a performance of 106 dB SNR at 625 kSPS, making it ideal for high speed data acquisition. Wide dynamic ran

24-Bit, 8.5 mW, 109 dB, 128 kSPS/64 kSPS/32 kSPS ADCs

FEATURES ► Oversampled successive approximation (SAR) architecture ► High performance ac and dc accuracy, low power ► 115.5 dB dynamic range, 32 kSPS (AD7767-2) ► 112.5 dB dynamic range, 64 kSPS (AD7767-1) ► 109.5 dB dynamic range, 128 kSPS (AD7767) ► −118 dB THD ► Exceptionally low power

625 kSPS, 24-Bit, 109 dB Sigma-Delta ADC With On-Chip Buffer

文件：799.42 Kbytes Page：29 Pages

Sigma-Delta ADC With On-Chip Buffer

文件：619.72 Kbytes Page：29 Pages

封装/外壳：64-TQFP 裸露焊盘 包装：管件 描述：IC ADC 24BIT SIGMA-DELTA 64TQFP 集成电路（IC） 模数转换器（ADC）

Sigma-Delta ADC With On-Chip Buffer

文件：619.72 Kbytes Page：29 Pages

Sigma-Delta ADC With On-Chip Buffer

文件：619.72 Kbytes Page：29 Pages

封装/外壳：64-TQFP 裸露焊盘 包装：管件 描述：IC ADC 24BIT SIGMA-DELTA 64TQFP 集成电路（IC） 模数转换器（ADC）

FL SFP

文件：209.77 Kbytes Page：5 Pages