16-Channel, 1 MSPS, 12-Bit ADC with Sequencer in 28-Lead TSSOP

GENERAL DESCRIPTION The AD7490 is a 12-bit high speed, low power, 16-channel, successive approximation ADC. The part operates from a single 2.7 V to 5.25 V power supply and features throughput rates up to 1 MSPS. The part contains a low noise, wide bandwidth track-and-hold amplifier that can hand

16-Channel, 1 MSPS, 12-Bit ADC with Sequencer in 28-Lead TSSOP

文件：673.72 Kbytes Page：28 Pages

16-Channel, 1 MSPS, 12-Bit ADC

文件：748.16 Kbytes Page：29 Pages

封装/外壳：32-VFQFN 裸露焊盘，CSP 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC ADC 12BIT SAR 32LFCSP 集成电路（IC） 模数转换器（ADC）

封装/外壳：32-VFQFN 裸露焊盘，CSP 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC ADC 12BIT SAR 32LFCSP 集成电路（IC） 模数转换器（ADC）

16-Channel, 1 MSPS, 12-Bit ADC

文件：748.16 Kbytes Page：29 Pages

16-Channel, 1 MSPS, 12-Bit ADC with Sequencer in 28-Lead TSSOP

文件：673.72 Kbytes Page：28 Pages

Decade and Binary Counters

General Description The DM7490A monolithic counter contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the count cycle length is divide-by-five. The counter has a gated zero reset and also has gated setto-nine

The ’90 is a 4-stage ripple counter containing a high speed flip-flop acting as a divide-by-two and three flip-flops connected as a divideby- five counter.

DESCRIPTION — The ’90 is a 4-stage ripple counter containing a high speed flip-flop acting as a divide-by-two and three flip-flops connected as a divideby- five counter. It can be connected to operate with a conventional BCD output pattern or it can be connected to provide a 50% duty cycle

Decade and Binary Counters

文件：133.7 Kbytes Page：10 Pages

Package Contains a Divide-by-Two and a Divide-by-Five Counter

文件：410.83 Kbytes Page：1 Pages

Package Contains a Divide-by-Two and a Divide-by-Five Counter

文件：410.83 Kbytes Page：1 Pages