Pseudo Differential Input, Quad, 4 MSPS Simultaneous Sampling, 16-Bit/14-Bit, SAR ADC

GENERAL DESCRIPTION The 16-bit AD7383-4 and 14-bit AD7384-4 are pin-compatible, quad, simultaneous sampling, high speed, successive approximation register (SAR), analog-to-digital converters (ADCs) operating from a 3.0 V to 3.3 V power supply with throughput rates up to 4 MSPS. The analog inp

双路同步采样，16 位 SAR ADC，差分输入

AD7380/AD7381分别为16位和14位引脚兼容系列双通道同步采样、高速、低功耗、逐次逼近寄存器(SAR)型模数转换器(ADC)，采用3.0 V至3.6 V电源供电，最高吞吐速率达4 MSPS。模拟输入类型为差分，接受宽共模输入电压，在CS下降沿进行采样和转换。\n\n 集成片内过采样模块可改善动态范围并在更低带宽下降低噪声。器件内置2.5 V缓冲基准电压源。或者，也可以使用最高3.3 V的外部基准电压源。\n\n 转换过程和数据采集过程均采用标准控制输入，可与微处理器或数字信号处理器(DSP)轻松接口。使用独立逻辑电源时，该器件兼容1.8V、2.5V和3.3 V接口 • 16位/14位ADC系列\n\n• 双通道同步采样\n\n• 全差分模拟输入\n\n• 吞吐转换速率：4 MSPS\n\n• SNR（典型值）\n• 92.5 dB，VREF = 3.3 V外部，AD7380（16位）\n\n• 85.4 dB，VREF = 3.3 V外部，AD7381（14位）\n\n• 101 dB（采用×16 OSR）\n\n\n\n\n• 片内过采样功能\n\n• 分辨率增强功能;

1nV/?숰z 420MHz GBW, 180V/關s, Low Distortion Rail-to-Rail Output Op Amps

文件：2.2649 Mbytes Page：28 Pages

Differential Inputs, 1 MSPS/500 kSPS, Dual Simultaneous Sampling SAR ADCs

文件：427.87 Kbytes Page：29 Pages

Pseudo Differential Input, 1 MSPS/500 kSPS, Dual, Simultaneous Sampling, 16-Bit, SAR ADCs

文件：656.17 Kbytes Page：30 Pages

Dual, Simultaneous Sampling SAR ADCs, Differential Inputs

文件：699.74 Kbytes Page：31 Pages

Differential Input, Quad, External Reference Simultaneous Sampling, 16-Bit, SAR ADC

文件：665.24 Kbytes Page：31 Pages

Differential Input, Quad,14-Bit, Simultaneous Sampling, SAR ADC

文件：638.72 Kbytes Page：31 Pages

Differential Input, Quad, Internal Reference Simultaneous Sampling, 16-Bit SAR ADC

文件：611.72 Kbytes Page：31 Pages

差分输入、四通道、外部基准电压源、同步采样、16位SAR ADC

AD7380-4是一款16位兼容型四通道同步采样、高速、逐次逼近寄存器(SAR)模数转换器(ADC)，采用3.3 V电源供电，最高吞吐速率达4 MSPS。差分模拟输入接受宽共模输入电压，在CS下降沿进行采样和转换。\n\n AD7380-4具有片内过采样模块，可改善动态范围并在更低带宽下降低噪声。过采样可将分辨率提升多达两位。REFIN引脚的基准电压范围为2.5至3.3V。\n\n 转换过程和数据采集过程均采用标准控制输入，可与微处理器或数字信号处理器(DSP)轻松接口。转换结果可通过4线模式同时输出以提供更快的吞吐速率，或者在允许较慢的吞吐速率时通过1线串行模式输出。使用 • 16位ADC系列\n\n• 四路同步采样\n\n• 全差分模拟输入\n\n• 高吞吐速率：4 MSPS\n\n• SNR：VREF = 3.3 V时为91 dB（典型值）\n\n• 片内过采样功能\n\n• SNR：OSR = 8×、RES = 1时为97.7 dB（典型值）;

Pseudo Differential Input, Quad, 4 MSPS Simultaneous Sampling, 16-Bit/14-Bit, SAR ADC

GENERAL DESCRIPTION The 16-bit AD7383-4 and 14-bit AD7384-4 are pin-compatible, quad, simultaneous sampling, high speed, successive approximation register (SAR), analog-to-digital converters (ADCs) operating from a 3.0 V to 3.3 V power supply with throughput rates up to 4 MSPS. The analog inp

Differential Input, Quad, External Reference Simultaneous Sampling, 16-Bit, SAR ADC

文件：665.24 Kbytes Page：31 Pages

Differential Input, Quad,14-Bit, Simultaneous Sampling, SAR ADC

文件：638.72 Kbytes Page：31 Pages

Differential Input, Quad, Internal Reference Simultaneous Sampling, 16-Bit SAR ADC

文件：611.72 Kbytes Page：31 Pages

Differential Input, Quad, External Reference Simultaneous Sampling, 16-Bit, SAR ADC

文件：665.24 Kbytes Page：31 Pages

Differential Input, Quad, External Reference Simultaneous Sampling, 16-Bit, SAR ADC

文件：665.24 Kbytes Page：31 Pages

封装/外壳：24-UFQFN 裸露焊盘，CSP 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：4MSPS 16-BIT QUAD DIFFERENTIAL S 集成电路（IC） 模数转换器（ADC）

封装/外壳：24-UFQFN 裸露焊盘，CSP 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：4MSPS 16-BIT QUAD DIFFERENTIAL S 集成电路（IC） 模数转换器（ADC）

Differential Input, Quad, External Reference Simultaneous Sampling, 16-Bit, SAR ADC

文件：665.24 Kbytes Page：31 Pages

Dual, Simultaneous Sampling SAR ADCs, Differential Inputs

文件：699.74 Kbytes Page：31 Pages

Dual, Simultaneous Sampling SAR ADCs, Differential Inputs

文件：699.74 Kbytes Page：31 Pages

FRAME ENGINE AND DATA LINK MANAGER 32P672

DESCRIPTION The PM7380 FREEDM-32P672 Frame Engine and Datalink Manager device is a monolithic integrated circuit that implements HDLC processing, and PCI Bus memory management functions for a maximum of 672 bi-directional channels. The FREEDM-32P672 may be configured to support H-MVIP, channelis

FRAME ENGINE AND DATA LINK MANAGER 32P672

DESCRIPTION The PM7380 FREEDM-32P672 Frame Engine and Datalink Manager device is a monolithic integrated circuit that implements HDLC processing, and PCI Bus memory management functions for a maximum of 672 bi-directional channels. The FREEDM-32P672 may be configured to support H-MVIP, channelis

Error correction and host interface IC for CD-ROM ELM

GENERAL DESCRIPTION The SAA7380 decoder is a block decoder buffer manager for high-speed CD-ROM applications that integrates real-time error correction and detection and host interface data transfer functions into a single chip. FEATURES • CD-ROM (Mode 1) and CD-I (Mode 2 - Form 1 and Form 2) f

Error correction and host interface IC for CD-ROM ELM

GENERAL DESCRIPTION The SAA7380 decoder is a block decoder buffer manager for high-speed CD-ROM applications that integrates real-time error correction and detection and host interface data transfer functions into a single chip. FEATURES • CD-ROM (Mode 1) and CD-I (Mode 2 - Form 1 and Form 2) f

Frame Engine and Data Link Manager

文件：48.51 Kbytes Page：2 Pages