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AD719价格

参考价格:¥51.7957

型号:AD7190BRUZ 品牌:Analog 备注:这里有AD719多少钱,2026年最近7天走势,今日出价,今日竞价,AD719批发/采购报价,AD719行情走势销售排行榜,AD719报价。
型号 功能描述 生产厂家 企业 LOGO 操作

4.8 kHz Ultra-Low Noise 24-Bit Sigma-Delta ADC with PGA

GENERAL DESCRIPTION The AD7190 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (∑-Δ) analog to digital converter (ADC). The on-chip low noise gain stage means that signals of small amplitude can be interfaced dir

AD

亚德诺

Pin-Programmable, Ultralow Noise, 24-Bit, Sigma-Delta ADC for Bridge Sensors

GENERAL DESCRIPTION The AD7191 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (Σ-Δ) ADC. The on-chip low noise gain stage means that signals of small amplitude can be interfaced directly to the ADC. It contains

AD

亚德诺

引脚可编程、超低噪声、24位、Σ-Δ型ADC,用于桥式传感器

AD7191是一款适合高精密测量应用的低噪声完整模拟前端。它集成一个低噪声、24位Σ-Δ型ADC。片内低噪声增益级意味着可直接输入小信号。它含有两路差分模拟输入。该器件还内置一个温度传感器,可用于温度补偿。   为便于使用,AD7191的特性均由专用引脚控制。片内PGA具有1、8、64或128的增益,支持±5 V、±625 mV、±78 mV或±39 mV的满量程差分输入。输出数据速率可编程为10 Hz、50 Hz、60 Hz或120 Hz。当输出数据速率设置为10 Hz或50 Hz时,可同时获得50 Hz/60 Hz抑制;当输出数据速率设置为60 Hz时,只能获得60 Hz抑制。A • 引脚可编程输出速率\n• 输出数据速率:10 Hz、50 Hz、60 Hz、120 Hz\n• 引脚可编程PGA;

AD

亚德诺

Pin-Programmable, Ultralow Noise, 24-Bit, Sigma-Delta ADC for Bridge Sensors

GENERAL DESCRIPTION The AD7191 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (Σ-Δ) ADC. The on-chip low noise gain stage means that signals of small amplitude can be interfaced directly to the ADC. It contains

AD

亚德诺

Pin-Programmable, Ultralow Noise, 24-Bit, Sigma-Delta ADC for Bridge Sensors

GENERAL DESCRIPTION The AD7191 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (Σ-Δ) ADC. The on-chip low noise gain stage means that signals of small amplitude can be interfaced directly to the ADC. It contains

AD

亚德诺

4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA

GENERAL DESCRIPTION The AD7192 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC). The on-chip low noise gain stage means that signals of small amplitude can be interfaced dir

AD

亚德诺

4.8 kHz、超低噪声、24位、Σ-Δ型ADC,内置PGA

AD7192是一款适合高精密测量应用的低噪声完整模拟前端。它集成一个低噪声、24位Σ-Δ型模数转换器(ADC)。片内低噪声增益级意味着可直接输入小信号。\n\n 这款器件可配置为两路差分输入或四路伪差分输入。片内通道序列器可以使能多个通道,AD7192按顺序在各使能通道上执行转换,这可以简化与器件的通信。片内4.92 MHz时钟可以用作ADC的时钟源;或者,也可以使用外部时钟或晶振。该器件的输出数据速率可在4.7 Hz至4.8 kHz的范围内变化。\n\n 这款器件提供两种数字滤波器选项。滤波器的选择会影响以编程输出数据速率工作时的均方根噪声和无噪声分辨率、建立时间以及50 • 下载示例代码\n\n• 均方根噪声:11 nV (4.7 Hz, G = 128)\n\n• 15.5位无噪声分辨率(2.4 kHz, G = 128)\n\n• 无噪声分辨率高达22位(G = 1)\n\n• 失调漂移:5 nV/°C\n\n\n\n• 增益漂移:1 ppm/°C\n\n• 稳定的时间漂移特性\n\n• 2个差分/4个伪差分输入通道\n\n• 自动通道序列器\n\n• 可编程增益(1至128)\n\n• 欲了解更多特性,请参考数据手册;

AD

亚德诺

4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA

GENERAL DESCRIPTION The AD7192 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC). The on-chip low noise gain stage means that signals of small amplitude can be interfaced dir

AD

亚德诺

4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA

GENERAL DESCRIPTION The AD7192 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC). The on-chip low noise gain stage means that signals of small amplitude can be interfaced dir

AD

亚德诺

4-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA

GENERAL DESCRIPTION The AD7193 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC). The on-chip low noise gain stage means that signals of small amplitude can interface directl

AD

亚德诺

内置PGA的4通道、4.8 kHz、超低噪声、24位Σ-Δ ADC

AD7193是一款适合高精密测量应用的低噪声完整模拟前端。它集成一个低噪声、24位Σ-Δ模数转换器(ADC)。片内低噪声增益级意味着ADC中可直接输入小信号。 \n\n 这款器件可配置为四路差分输入或八路伪差分输入。片内通道序列器可以同时使能多个通道,AD7193按顺序在各使能通道上执行转换,简化了与器件的通信。片内4.92 MHz时钟可以用作ADC的时钟源;或者,也可以使用外部时钟或晶振。该器件的输出数据速率可在4.7 Hz至4.8 kHz的范围内变化。\n\n 这款器件具有非常灵活的数字滤波器,包括一个快速建立选项。输出数据速率和建立时间等变量取决于所选的选项。AD71 • 快速建立滤波器选项\n\n• 4个差分/8个伪差分输入通道\n\n• 有效值噪声:11 nV(4.7 Hz,G = 128)\n\n• 15.5位无噪声分辨率(2.4 kHz,G = 128)\n\n• 无噪声分辨率高达22位(G = 1)\n\n• 失调漂移:±5 nV/℃\n\n• 增益漂移:±1 ppm/°C\n\n• 额定时间漂移特性\n\n• 自动通道序列器\n\n• 可编程增益(1至128)\n\n• 输出数据速率:4.7 Hz至4.8 kHz\n\n• 内部或外部时钟\n\n• 50 Hz/60 Hz同时抑制\n\n• 4路通用数字输出\n\n• 电源\n• AVDD:3 V;

AD

亚德诺

4-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA

GENERAL DESCRIPTION The AD7193 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC). The on-chip low noise gain stage means that signals of small amplitude can interface directl

AD

亚德诺

4-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA

GENERAL DESCRIPTION The AD7193 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC). The on-chip low noise gain stage means that signals of small amplitude can interface directl

AD

亚德诺

8-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA

GENERAL DESCRIPTION The AD7194 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC). The on-chip low noise gain stage means that signals of small amplitude can interface directl

AD

亚德诺

8-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA

FEATURES Fast settling filter option 8 differential/16 pseudo differential input channels RMS noise: 11 nV at 4.7 Hz (gain = 128) 15.5 noise-free bits at 2.4 kHz (gain = 128) Up to 22 noise-free bits (gain = 1) Offset drift: ±5 nV/°C Gain drift: ±1 ppm/°C Programmable gain (1 to 128) Outp

AD

亚德诺

8-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA

FEATURES Fast settling filter option 8 differential/16 pseudo differential input channels RMS noise: 11 nV at 4.7 Hz (gain = 128) 15.5 noise-free bits at 2.4 kHz (gain = 128) Up to 22 noise-free bits (gain = 1) Offset drift: ±5 nV/°C Gain drift: ±1 ppm/°C Programmable gain (1 to 128) Outp

AD

亚德诺

8-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA

FEATURES Fast settling filter option 8 differential/16 pseudo differential input channels RMS noise: 11 nV at 4.7 Hz (gain = 128) 15.5 noise-free bits at 2.4 kHz (gain = 128) Up to 22 noise-free bits (gain = 1) Offset drift: ±5 nV/°C Gain drift: ±1 ppm/°C Programmable gain (1 to 128) Outp

AD

亚德诺

8-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA

GENERAL DESCRIPTION The AD7194 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC). The on-chip low noise gain stage means that signals of small amplitude can interface directl

AD

亚德诺

8-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA

GENERAL DESCRIPTION The AD7194 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC). The on-chip low noise gain stage means that signals of small amplitude can interface directl

AD

亚德诺

8-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA

FEATURES Fast settling filter option 8 differential/16 pseudo differential input channels RMS noise: 11 nV at 4.7 Hz (gain = 128) 15.5 noise-free bits at 2.4 kHz (gain = 128) Up to 22 noise-free bits (gain = 1) Offset drift: ±5 nV/°C Gain drift: ±1 ppm/°C Programmable gain (1 to 128) Outp

AD

亚德诺

8-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA

FEATURES Fast settling filter option 8 differential/16 pseudo differential input channels RMS noise: 11 nV at 4.7 Hz (gain = 128) 15.5 noise-free bits at 2.4 kHz (gain = 128) Up to 22 noise-free bits (gain = 1) Offset drift: ±5 nV/°C Gain drift: ±1 ppm/°C Programmable gain (1 to 128) Outp

AD

亚德诺

8-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA

GENERAL DESCRIPTION The AD7194 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC). The on-chip low noise gain stage means that signals of small amplitude can interface directl

AD

亚德诺

4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA and AC Excitation

GENERAL DESCRIPTION The AD7195 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC). The on-chip low noise gain stage means that signals of small amplitude can be interfaced direc

AD

亚德诺

4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA and AC Excitation

GENERAL DESCRIPTION The AD7195 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC). The on-chip low noise gain stage means that signals of small amplitude can be interfaced direc

AD

亚德诺

4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA and AC Excitation

GENERAL DESCRIPTION The AD7195 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC). The on-chip low noise gain stage means that signals of small amplitude can be interfaced direc

AD

亚德诺

4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA and AC Excitation

GENERAL DESCRIPTION The AD7195 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC). The on-chip low noise gain stage means that signals of small amplitude can be interfaced direc

AD

亚德诺

4.8 kHz Ultralow Noise 24-Bit Sigma-Delta ADC

文件:679.12 Kbytes Page:41 Pages

AD

亚德诺

4.8 kHz Ultralow Noise 24-Bit Sigma-Delta ADC with PGA

文件:749.48 Kbytes Page:40 Pages

AD

亚德诺

4.8 kHz Ultralow Noise 24-Bit Sigma-Delta ADC

文件:679.12 Kbytes Page:41 Pages

AD

亚德诺

4.8 kHz Ultralow Noise 24-Bit Sigma-Delta ADC with PGA

文件:749.48 Kbytes Page:40 Pages

AD

亚德诺

4.8 kHz Ultralow Noise 24-Bit Sigma-Delta ADC

文件:679.12 Kbytes Page:41 Pages

AD

亚德诺

4.8 kHz Ultralow Noise 24-Bit Sigma-Delta ADC

文件:679.12 Kbytes Page:41 Pages

AD

亚德诺

4.8 kHz Ultralow Noise 24-Bit Sigma-Delta ADC with PGA

文件:749.48 Kbytes Page:40 Pages

AD

亚德诺

封装/外壳:24-TSSOP(0.173",4.40mm 宽) 包装:托盘 描述:IC ADC 24BIT SIGMA-DELTA 24TSSOP 集成电路(IC) 模数转换器(ADC)

AD

亚德诺

4.8 kHz Ultralow Noise 24-Bit Sigma-Delta ADC

文件:679.12 Kbytes Page:41 Pages

AD

亚德诺

封装/外壳:24-TSSOP(0.173",4.40mm 宽) 包装:管件 描述:IC ADC 24BIT SIGMA-DELTA 24TSSOP 集成电路(IC) 模数转换器(ADC)

AD

亚德诺

4.8 kHz Ultralow Noise 24-Bit Sigma-Delta ADC

文件:679.12 Kbytes Page:41 Pages

AD

亚德诺

Sigma-Delta ADC for Bridge Sensors

文件:330.32 Kbytes Page:21 Pages

AD

亚德诺

Sigma-Delta ADC for Bridge Sensors

文件:330.32 Kbytes Page:21 Pages

AD

亚德诺

Sigma-Delta ADC for Bridge Sensors

文件:330.32 Kbytes Page:21 Pages

AD

亚德诺

Sigma-Delta ADC for Bridge Sensors

文件:330.32 Kbytes Page:21 Pages

AD

亚德诺

Sigma-Delta ADC with PGA

文件:559 Kbytes Page:41 Pages

AD

亚德诺

Sigma-Delta ADC with PGA

文件:559 Kbytes Page:41 Pages

AD

亚德诺

Sigma-Delta ADC with PGA

文件:559 Kbytes Page:41 Pages

AD

亚德诺

Sigma-Delta ADC with PGA

文件:559 Kbytes Page:41 Pages

AD

亚德诺

Devices Connected

文件:476.85 Kbytes Page:9 Pages

AD

亚德诺

24-Bit Sigma-Delta ADC with PGA

文件:1.10949 Mbytes Page:57 Pages

AD

亚德诺

24-Bit Sigma-Delta ADC with PGA

文件:1.10949 Mbytes Page:57 Pages

AD

亚德诺

24-Bit Sigma-Delta ADC with PGA

文件:1.10949 Mbytes Page:57 Pages

AD

亚德诺

24-Bit Sigma-Delta ADC with PGA

文件:1.10949 Mbytes Page:57 Pages

AD

亚德诺

24-Bit Sigma-Delta ADC with PGA

文件:1.10949 Mbytes Page:57 Pages

AD

亚德诺

24-Bit Sigma-Delta ADC with PGA

文件:1.10949 Mbytes Page:57 Pages

AD

亚德诺

24-Bit Sigma-Delta ADC with PGA

文件:1.10949 Mbytes Page:57 Pages

AD

亚德诺

24-Bit Sigma-Delta ADC with PGA

文件:1.12384 Mbytes Page:55 Pages

AD

亚德诺

24-Bit Sigma-Delta ADC with PGA

文件:1.12384 Mbytes Page:55 Pages

AD

亚德诺

24-Bit Sigma-Delta ADC with PGA

文件:1.12384 Mbytes Page:55 Pages

AD

亚德诺

24-Bit Sigma-Delta ADC with PGA

文件:1.12384 Mbytes Page:55 Pages

AD

亚德诺

24-Bit Sigma-Delta ADC with PGA

文件:1.12384 Mbytes Page:55 Pages

AD

亚德诺

Sigma-Delta ADC with PGA and AC Excitation

文件:1.01058 Mbytes Page:45 Pages

AD

亚德诺

4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA and AC Excitation

文件:546.45 Kbytes Page:45 Pages

AD

亚德诺

AD719产品属性

  • 类型

    描述

  • 型号

    AD719

  • 制造商

    AD

  • 制造商全称

    Analog Devices

  • 功能描述

    4.8 kHz Ultra-Low Noise 24-Bit Sigma-Delta ADC with PGA

更新时间:2026-5-23 23:00:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
ADI(亚德诺)
24+
TSSOP24
3024
原厂直供,支持账期,免费供样,技术支持
ADI(亚德诺)
25+
TSSOP-24
7589
全新原装现货,支持排单订货,可含税开票
ADI
25+
TSSOP24
22000
一级代理原装正品,实单必成。
ADI
24+
TSSOP
30000
ADI一级代理原装现货假一罚十
ADI
25+
tssop
7500
ADI原厂货源!假一赔十!
ADI(亚德诺)
23+
NA
27950
10年以上分销商,原装进口件,服务型企业
ADI/亚德诺
25+
TSSOP-24
36000
ADI/亚德诺全新特价AD7190BRUZ即刻询购立享优惠#长期有货
ADI/亚德诺
26+
TSSOP24
86500
一级代理专营品牌!原装正品,现货为客户做到零风险!!
ADI/亚德诺
25+
sop
8800
公司只做原装,可来电咨询
ADI
26+
SOP
10000
只有原装,一站式BOM配单

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