Low Cost Analog Multiplier

GENERAL DESCRIPTION The AD633 is a functionally complete, four-quadrant, analog multiplier. It includes high impedance, differential X and Y inputs, and a high impedance summing input (Z). The low impedance output voltage is a nominal 10 V full scale provided by a buried Zener. The AD633 is the

Low Cost Analog Multiplier

GENERAL DESCRIPTION The AD633 is a functionally complete, four-quadrant, analog multiplier. It includes high impedance, differential X and Y inputs, and a high impedance summing input (Z). The low impedance output voltage is a nominal 10 V full scale provided by a buried Zener. The AD633 is the

Low Cost Analog Multiplier

FEATURES 4-quadrant multiplication Low cost, 8-lead SOIC and PDIP packages Complete—no external components required Laser-trimmed accuracy and stability Total error within 2% of full scale Differential high impedance X and Y inputs High impedance unity-gain summing input Laser-trimmed

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 功能：模拟乘法器 包装：管件 描述：IC MULTIPLIER ANALOG 8-SOIC 集成电路（IC） 模拟乘法器、除法器

Low Cost Analog Multiplier

文件：903.52 Kbytes Page：21 Pages

Low Cost Analog Multiplier

GENERAL DESCRIPTION The AD633 is a functionally complete, four-quadrant, analog multiplier. It includes high impedance, differential X and Y inputs, and a high impedance summing input (Z). The low impedance output voltage is a nominal 10 V full scale provided by a buried Zener. The AD633 is the

Low Cost Analog Multiplier

GENERAL DESCRIPTION The AD633 is a functionally complete, four-quadrant, analog multiplier. It includes high impedance, differential X and Y inputs, and a high impedance summing input (Z). The low impedance output voltage is a nominal 10 V full scale provided by a buried Zener. The AD633 is the

Low Cost Analog Multiplier

FEATURES 4-quadrant multiplication Low cost, 8-lead SOIC and PDIP packages Complete—no external components required Laser-trimmed accuracy and stability Total error within 2% of full scale Differential high impedance X and Y inputs High impedance unity-gain summing input Laser-trimmed

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 功能：模拟乘法器 包装：管件 描述：IC MULTIPLIER ANALOG 8-SOIC 集成电路（IC） 模拟乘法器、除法器

Low Cost Analog Multiplier

文件：903.52 Kbytes Page：21 Pages

633M Series D-Sub Connectors | Machined Pins | High Density Three Contact Rows with 0.350 (8.89mm) Footprint Right Angle Bend | Plug

Features High Density Three Contact Rows with .350(8.89mm) Footprint Right Angle Bend with Machined Contacts .090(2.29mm) Contact Spacing 0.078(1.98mm) Row Spacing Plug and Receptacle in 15, 26, 44 or 62 Contact Sizes Pin and Socket Contact Mating Design with P.C. Tail Termination M

633 Series D-Sub Connectors | High Density Three Contact Rows with .350(8.89mm) Footprint RightAngle Bend | Plug

Features High Density Three Contact Rows with .350(8.89mm) Footprint Right Angle Bend Standard Contact Spacing and Row Spacing Optional 9th pin recessed on 15 Contact Size in accordance with VESA Display Data Channel Standard Plug and Receptacle in 15, 26, 44, 62 or 78 Contact Sizes

633W Series D-Sub Connectors | Waterproof | High Density | 0.090 (2.29mm) Contact Spacing x 0.078 (1.98mm) Row Spacing | Right Angle | Plug

Features High Density Waterproof D-Sub .090(2.29mm) Contact Spacing x .078(1.98mm) Row Spacing Plug and Receptacle in 15, 26 or 44 Contact Pin Sizes Pin Contact Mating Design with P.C. Tail Termination in Right Angle, Straight or Solder Cup Termination Plug Shell Indents Provide Gro

Low Frequencies

文件：141.01 Kbytes Page：2 Pages

60V Complementary Enhancement Mode Field Effect Transistor

文件：1.13096 Mbytes Page：10 Pages