E-pHEMT MMIC

Description AD412 is designed as low cost Active Divider for many applications including FTTH, CATV System. This MMIC is based on Gallium Arsenide Enhancement Mode pHEMT which shows low current draw and very low noise. The data in this spec sheet is valid only for 75 ohm application. Produ

E-pHEMT MMIC

32 μA, Ultra-Low Power, 16-Bit Sigma-Delta ADC with Integrated PGA and FIFO

The AD4129-4 is an ultra-low power, high precision, and measurementsolution for low bandwidth battery-operated applications. Thefully integrated analog front end (AFE) includes a multiplexer forup to 8 single-ended or 4 differential inputs, programmable gainamplifier (PGA), 16-bit sigma-delta (Σ-Δ) Ultra-low current consumption (typical)\n 32 μA: continuous conversion mode (gain = 128)\n 5 μA: duty cycling mode (ratio = 1/16)\n 0.5 μA: standby mode\n 0.1 μA: power-down mode\nBuilt-in features for system level power savings\n Current saving duty cycle ratio: 1/4 or 1/16\n Smart sequencer and pe;

32 μA, Ultra-Low Power, 16-Bit Sigma-Delta ADC with Integrated PGA and FIFO

FEATURES ► Ultra-low current consumption (typical) ► 32 μA: continuous conversion mode (gain = 128) ► 5 μA: duty cycling mode (ratio = 1/16) ► 0.5 μA: standby mode ► 0.1 μA: power-down mode ► Built-in features for system level power savings ► Current saving duty cycle ratio: 1/4 or 1/16 ►

32 μA, Ultra-Low Power, 16-Bit Sigma-Delta ADC with Integrated PGA and FIFO

FEATURES ► Ultra-low current consumption (typical) ► 32 μA: continuous conversion mode (gain = 128) ► 5 μA: duty cycling mode (ratio = 1/16) ► 0.5 μA: standby mode ► 0.1 μA: power-down mode ► Built-in features for system level power savings ► Current saving duty cycle ratio: 1/4 or 1/16 ►

32 μA, Ultra-Low Power, 16-Bit Sigma-Delta ADC with Integrated PGA and FIFO

FEATURES ► Ultra-low current consumption (typical) ► 32 μA: continuous conversion mode (gain = 128) ► 5 μA: duty cycling mode (ratio = 1/16) ► 0.5 μA: standby mode ► 0.1 μA: power-down mode ► Built-in features for system level power savings ► Current saving duty cycle ratio: 1/4 or 1/16 ►

32 μA, Ultra-Low Power, 16-Bit Sigma-Delta ADC with Integrated PGA and FIFO

FEATURES ► Ultra-low current consumption (typical) ► 32 μA: continuous conversion mode (gain = 128) ► 5 μA: duty cycling mode (ratio = 1/16) ► 0.5 μA: standby mode ► 0.1 μA: power-down mode ► Built-in features for system level power savings ► Current saving duty cycle ratio: 1/4 or 1/16 ►

32 μA, Ultra-Low Power, 16-Bit Sigma-Delta ADC with Integrated PGA and FIFO

FEATURES ► Ultra-low current consumption (typical) ► 32 μA: continuous conversion mode (gain = 128) ► 5 μA: duty cycling mode (ratio = 1/16) ► 0.5 μA: standby mode ► 0.1 μA: power-down mode ► Built-in features for system level power savings ► Current saving duty cycle ratio: 1/4 or 1/16 ►

32 μA, Ultra-Low Power, 16-Bit Sigma-Delta ADC with Integrated PGA and FIFO

FEATURES ► Ultra-low current consumption (typical) ► 32 μA: continuous conversion mode (gain = 128) ► 5 μA: duty cycling mode (ratio = 1/16) ► 0.5 μA: standby mode ► 0.1 μA: power-down mode ► Built-in features for system level power savings ► Current saving duty cycle ratio: 1/4 or 1/16 ►

32 μA, Ultra Low Power, 16-Bit Sigma-Delta ADC with Integrated PGA and FIFO

FEATURES ► Ultra-low current consumption (typical): ► 32 μA: continuous conversion mode (gain = 128) ► 5 μA: duty cycling mode (ratio = 1/16) ► 0.5 μA: standby mode ► 0.1 μA: power-down mode ► Built-in features for system level power savings: ► Current saving duty cycle ratio: 1/4 or 1/16

具有集成 PGA 和 FIFO 的 32 μA，超低功耗，16 位 Σ-Δ ADC

AD4129-8是一款超低功耗的高精度测量解决方案，适用于使用低带宽电池工作的应用。完全集成的模拟前端(AFE)包括可用于多达16个单端或8个差分输入的多路复用器、可编程增益放大器(PGA)、16位Σ-Δ模数转换器(ADC)、片上基准电压源和振荡器、可选滤波器选项、智能时序控制器、传感器偏置和激励选项、诊断和新增功能，可提高使用电池的运行寿命（纽扣电池超过五年），即先入先出(FIFO)缓冲区和占空比。\n\n 利用AD4129-8，可在连续转换时测量电流消耗为28.5 μA（增益 = 1）和32.5 μA（增益 = 128）的低频信号，使用其中一种占空比选项时平均电流甚至更低。将AD • 超低电流消耗（典型值）：\n• 32 μA：连续转换模式（增益 = 128）\n\n• 5 μA：占空比模式（比率 = 1/16）\n\n• 0.5 μA：待机模式\n\n• 0.1 μA：关断模式\n\n\n\n\n• 内置系统级节能功能：\n• 节电占空比：1/4 或 1/16\n\n• 智能时序控制器和每个通道配置可将主机处理器负载降至最低\n\n• 深度嵌入式 FIFO 可将主机处理器负载降至最低（样本深度为 256）\n\n• 自主 FIFO 中断功能，阈值检测\n\n• 低至 1.71 V 的单电源可延长电池工作时间\n\n\n\n\n• 有效值噪声：在 1.17 SPS（增益;

32 μA, Ultra Low Power, 16-Bit Sigma-Delta ADC with Integrated PGA and FIFO

FEATURES ► Ultra-low current consumption (typical): ► 32 μA: continuous conversion mode (gain = 128) ► 5 μA: duty cycling mode (ratio = 1/16) ► 0.5 μA: standby mode ► 0.1 μA: power-down mode ► Built-in features for system level power savings: ► Current saving duty cycle ratio: 1/4 or 1/16

封装/外壳：模块 包装：盒 描述：410-415 MHZ 420-425 MHZ CAVITY D RF/IF，射频/中频和 RFID 射频多路复用器

Dual Wideband Video Op Amp

文件：1.39832 Mbytes Page：12 Pages

Dual Wideband Video Op Amp

文件：1.39832 Mbytes Page：12 Pages

Dual Wideband Video Op Amp

文件：1.39832 Mbytes Page：12 Pages

Dual Wideband Video Op Amp

文件：1.39832 Mbytes Page：12 Pages

Low Offset, Low Drift Dual JFET Input Operational Amplifier

文件：565.24 Kbytes Page：13 Pages