The A8583 is an adjustable frequency, high output current, PWM regulator that integrates a low resistance, high-side, N-channel MOSFET.

文件：841.46 Kbytes Page：33 Pages

Wide Input Voltage, 2.4 MHz, 3.5 A Asynchronous Buck Regulator

The A8583 is an adjustable frequency, high output current, PWM regulator that integrates a low resistance, high-side, N-channel MOSFET.

文件：841.46 Kbytes Page：33 Pages

封装/外壳：16-TSSOP（0.173"，4.40mm 宽）裸露焊盘 功能：降压 包装：卷带（TR） 描述：IC REG BUCK ADJ 3.5A 16TSSOP 集成电路（IC） 稳压器 - DC-DC 开关稳压器

封装/外壳：16-TSSOP（0.173"，4.40mm 宽）裸露焊盘 功能：降压 包装：卷带（TR） 描述：IC REG BUCK ADJ 3.5A 16TSSOP 集成电路（IC） DC DC 开关稳压器

ARINC 429 SYSTEM ON A CHIP

GENERAL DESCRIPTION The HI-8582/HI-8583 from Holt Integrated Circuits are a silicon gate CMOS devices for interfacing a 16-bit parallel data bus directly to the ARINC 429 serial bus. The HI-8582/HI-8583 design offers many enhancements to the industry standard HI-8282 architecture. The device pr

ARINC 429 SYSTEM ON A CHIP

GENERAL DESCRIPTION The HI-8582/HI-8583 from Holt Integrated Circuits are a silicon gate CMOS devices for interfacing a 16-bit parallel data bus directly to the ARINC 429 serial bus. The HI-8582/HI-8583 design offers many enhancements to the industry standard HI-8282 architecture. The device pr

Clock/calendar with 240 x 8-bit RAM

GENERAL DESCRIPTION The PCF8583 is a clock/calendar circuit based on a 2048-bit static CMOS RAM organized as 256 words by 8 bits. Addresses and data are transferred serially via the two-line bidirectional I2C-bus. The built-in word address register is incremented automatically after each written

Clock/calendar with 240 x 8-bit RAM

GENERAL DESCRIPTION The PCF8583 is a clock/calendar circuit based on a 2048-bit static CMOS RAM organized as 256 words by 8 bits. Addresses and data are transferred serially via the two-line bidirectional I2C-bus. The built-in word address register is incremented automatically after each written

Clock/calendar with 240 x 8-bit RAM

GENERAL DESCRIPTION The PCF8583 is a clock/calendar circuit based on a 2048-bit static CMOS RAM organized as 256 words by 8 bits. Addresses and data are transferred serially via the two-line bidirectional I2C-bus. The built-in word address register is incremented automatically after each written