15 to 19-Output Buffers for PCIe Gen1–5 and UPI

Features ▪ LP-HCSL outputs eliminate up to 4 resistors per output pair ▪ 9 selectable SMBus addresses ▪ Selectable PLL bandwidths minimizes jitter peaking in cascaded PLL topologies ▪ Hardware/SMBus control of ZDB and FOB modes allow change without power cycle ▪ 8 OE# pins support PCIe CLKR

19-Output DB1900Z Derivative for PCIe Gen1?? and UPI

文件：359.58 Kbytes Page：24 Pages

封装/外壳：72-VFQFN 裸露焊盘 包装：管件 描述：DB1900ZL OEM DERIV \ 集成电路（IC） 应用特定时钟/定时

19-Output DB1900Z Low-Power Derivative with 85ohm Terminations

Features/Benefits • LP-HCSL outputs; up to 90 IO power reduction, better signal integrity over long traces • Direct connect to 85Ω transmission lines; eliminates 76 termination resistors, saves 130mm2 area • Pin compatible to the 9ZXL1930; easy upgrade to reduced board space • 72-pin VFQFPN

Fixed feedback path

文件：296.21 Kbytes Page：18 Pages

19-output DB1900Z Low-Power Derivative w/85ohm Terminations

文件：296.64 Kbytes Page：18 Pages

15 to 19-Output Buffers for PCIe Gen1–5 and UPI

Features ▪ LP-HCSL outputs eliminate up to 4 resistors per output pair ▪ 9 selectable SMBus addresses ▪ Selectable PLL bandwidths minimizes jitter peaking in cascaded PLL topologies ▪ Hardware/SMBus control of ZDB and FOB modes allow change without power cycle ▪ 8 OE# pins support PCIe CLKR

19-Output DB1900Z Derivative for PCIe Gen1?? and UPI

文件：359.58 Kbytes Page：24 Pages

封装/外壳：72-VFQFN 裸露焊盘 包装：卷带（TR） 描述：DB1900ZL OEM DERIV \ 集成电路（IC） 应用特定时钟/定时

19-Output DB1900Z Low-Power Derivative with 85ohm Terminations

文件：267.21 Kbytes Page：18 Pages

19-output DB1900Z Low-Power Derivative w/85ohm Terminations

文件：296.64 Kbytes Page：18 Pages