4-OUTPUT VERY LOW POWER PCIE GEN 1–4 CLOCK GENERATOR

Features/Benefits • Integrated terminations provide 100 differential Zo; reduced component count and board space • 1.8V operation; reduced power consumption • OE# pins; support DIF power management • LP-HCSL differential clock outputs; reduced power and board space • Programmable slew rate

封装/外壳：32-VFQFN 裸露焊盘 包装：卷带（TR） 描述：IC PLL CLOCK GEN 32-MLF 集成电路（IC） 应用特定时钟/定时

4-OUTPUT VERY LOW POWER PCIE GEN 1-2-3-4 CLOCK GENERATOR

文件：294.55 Kbytes Page：16 Pages

Programmable Slew rate for each output

Description The 9FGV0441 is an 4-output very low power clock generator for PCIe Gen 1, 2, 3 and 4 applications with integrated output terminations providing Zo = 100. The device has 4 output enables for clock management and supports 2 different spread spectrum levels in addition to spread off.

4-OUTPUT VERY LOW POWER PCIE GEN 1–4 CLOCK GENERATOR

Features/Benefits • Integrated terminations provide 100 differential Zo; reduced component count and board space • 1.8V operation; reduced power consumption • OE# pins; support DIF power management • LP-HCSL differential clock outputs; reduced power and board space • Programmable slew rate

4-OUTPUT VERY LOW POWER PCIE GEN 1–4 CLOCK GENERATOR

Features/Benefits • Integrated terminations provide 100 differential Zo; reduced component count and board space • 1.8V operation; reduced power consumption • OE# pins; support DIF power management • LP-HCSL differential clock outputs; reduced power and board space • Programmable slew rate

4-OUTPUT VERY LOW POWER PCIE GEN 1-2-3-4 CLOCK GENERATOR

文件：294.55 Kbytes Page：16 Pages

4-OUTPUT VERY LOW POWER PCIE GEN 1-2-3-4 CLOCK GENERATOR

文件：294.55 Kbytes Page：16 Pages