1:2 Differential-to-LVPECL Buffer/Divider

General Description The 8S89874 is a high speed 1:2 Differential-to- LVPECL Buffer/ Divider. The 8S89874 has a selectable ÷1, ÷2, ÷4, ÷8, ÷16 output divider, which allows the device to be used as either a 1:2 fanout buffer or frequency divider. The clock input has internal termination resisto

封装/外壳：16-VFQFN 裸露焊盘 包装：托盘 描述：VFQFPN 3.00X3.00X1.00 MM, 0.50MM 集成电路（IC） 时钟缓冲器，驱动器

1:2 Differential-to-LVPECL Buffer/Divider

文件：755.46 Kbytes Page：19 Pages

1:2 Different ial-to-LVPECL Buffer/Divider

文件：366.72 Kbytes Page：20 Pages

1:2 Differential-to-LVPECL Buffer/Divider

General Description The 8S89874 is a high speed 1:2 Differential-to- LVPECL Buffer/ Divider. The 8S89874 has a selectable ÷1, ÷2, ÷4, ÷8, ÷16 output divider, which allows the device to be used as either a 1:2 fanout buffer or frequency divider. The clock input has internal termination resisto

1:2 Different ial-to-LVPECL Buffer/Divider

文件：366.72 Kbytes Page：20 Pages

1:2 Differential-to-LVPECL Buffer/Divider

General Description The 8S89874 is a high speed 1:2 Differential-to- LVPECL Buffer/ Divider. The 8S89874 has a selectable ÷1, ÷2, ÷4, ÷8, ÷16 output divider, which allows the device to be used as either a 1:2 fanout buffer or frequency divider. The clock input has internal termination resisto

1:2 Different ial-to-LVPECL Buffer/Divider

文件：366.72 Kbytes Page：20 Pages

1:2 Differential-to-LVPECL Buffer/Divider

文件：755.46 Kbytes Page：19 Pages