Low Skew, 1-to-4 Differential-to-3.3V LVPECL Fanout Buffer

FEATURES • Four differential 3.3V LVPECL outputs • Selectable differential CLK, nCLK or LVPECL clock inputs • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL • Maximum out

封装/外壳：20-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC CLK BUFFER 2:4 650MHZ 20TSSOP 集成电路（IC） 时钟缓冲器，驱动器

Differential-to-3.3V LVPECL Fanout Buffer

文件：350.33 Kbytes Page：18 Pages

Low Skew, 1-to-4 Differential-to-3.3V LVPECL Fanout Buffer

FEATURES • Four differential 3.3V LVPECL outputs • Selectable differential CLK, nCLK or LVPECL clock inputs • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL • Maximum out

Differential-to-3.3V LVPECL Fanout Buffer

文件：350.33 Kbytes Page：18 Pages

DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER 3.3V operating supply

文件：217.04 Kbytes Page：17 Pages