HIGH-PERFORMANCE CHMOS MICROCONTROLLER

■ Real-time and Programmed Wait State Bus Operation ■ Binary-code Compatible with MCS® 51 ■ Pin Compatible with 44-pin PLCC and 40-pin PDIP MCS 51 Sockets ■ Register-based MCS® 251 Architecture — 40-byte Register File — Registers Accessible as Bytes, Words, or Double Words ■ Enriched M

HIGH-PERFORMANCE CHMOS MICROCONTROLLER

■ Real-time and Programmed Wait State Bus Operation\n■ Binary-code Compatible with MCS® 51\n■ Pin Compatible with 44-pin PLCC and 40-pin PDIP MCS 51 Sockets\n■ Register-based MCS® 251 Architecture\n   — 40-byte Register File\n   — Registers Accessible as Bytes, Words, or Double Words\n■ Enriched MCS

HIGH-PERFORMANCE CHMOS MICROCONTROLLER

■ Real-time and Programmed Wait State Bus Operation ■ Binary-code Compatible with MCS® 51 ■ Pin Compatible with 44-pin PLCC and 40-pin PDIP MCS 51 Sockets ■ Register-based MCS® 251 Architecture — 40-byte Register File — Registers Accessible as Bytes, Words, or Double Words ■ Enriched M

HIGH-PERFORMANCE CHMOS MICROCONTROLLER

■ Real-time and Programmed Wait State Bus Operation ■ Binary-code Compatible with MCS® 51 ■ Pin Compatible with 44-pin PLCC and 40-pin PDIP MCS 51 Sockets ■ Register-based MCS® 251 Architecture — 40-byte Register File — Registers Accessible as Bytes, Words, or Double Words ■ Enriched M

HIGH-PERFORMANCE CHMOS MICROCONTROLLER

■ Real-time and Programmed Wait State Bus Operation ■ Binary-code Compatible with MCS® 51 ■ Pin Compatible with 44-pin PLCC and 40-pin PDIP MCS 51 Sockets ■ Register-based MCS® 251 Architecture — 40-byte Register File — Registers Accessible as Bytes, Words, or Double Words ■ Enriched M

HIGH-PERFORMANCE CHMOS MICROCONTROLLER

■ Real-time and Programmed Wait State Bus Operation ■ Binary-code Compatible with MCS® 51 ■ Pin Compatible with 44-pin PLCC and 40-pin PDIP MCS 51 Sockets ■ Register-based MCS® 251 Architecture — 40-byte Register File — Registers Accessible as Bytes, Words, or Double Words ■ Enriched M