3-to-8 Decoder/Demultiplexer

General Description The VHCT138A is an advanced high speed CMOS 3-to-8 DECODER fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. Features ■High Speed: tPD =7.6 n

3-to-8 Decoder/Demultiplexer

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3-to-8 Decoder/Demultiplexer

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封装/外壳：16-SOIC（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC DECODER/DEMUX 1X3:8 16SOP 集成电路（IC） 信号开关，多路复用器，解码器

封装/外壳：16-SOIC（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC DECODER/DEMUX 1X3:8 16SOP 集成电路（IC） 信号开关，多路复用器，解码器

3 TO 8 LINE DECODER INVERTING

DESCRIPTION The 74VHCT138A is an advanced high-speed CMOS 3 TO 8 LINE DECODER (INVERTING) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. ■ HIGH SPEED: tPD= 7.6 ns (TYP.) at VCC=5V ■ LOW POWER DISSIPATION: ICC=4µA (MAX.) at TA=25°C ■ COMPATIBLE

3 TO 8 LINE DECODER INVERTING

DESCRIPTION The 74VHCT138A is an advanced high-speed CMOS 3 TO 8 LINE DECODER (INVERTING) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. ■ HIGH SPEED: tPD= 7.6 ns (TYP.) at VCC=5V ■ LOW POWER DISSIPATION: ICC=4µA (MAX.) at TA=25°C ■ COMPATIBLE

3 TO 8 LINE DECODER INVERTING

DESCRIPTION The 74VHCT138A is an advanced high-speed CMOS 3 TO 8 LINE DECODER (INVERTING) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. ■ HIGH SPEED: tPD= 7.6 ns (TYP.) at VCC=5V ■ LOW POWER DISSIPATION: ICC=4µA (MAX.) at TA=25°C ■ COMPATIBLE

3-to-8 Line Decoder

The MC74VHCT138A is an advanced high speed CMOS 3–to–8 decoder fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. •High Speed: tPD= 7.6ns (Typ) at VCC= 5V •Low Power Dissipa

3-to-8 Line Decoder

The MC74VHCT138A is an advanced high speed CMOS 3–to–8 decoder fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. •High Speed: tPD= 7.6ns (Typ) at VCC= 5V •Low Power Dissipa