封装/外壳：48-TFSOP（0.240"，6.10mm 宽） 包装：卷带（TR）剪切带（CT） 描述：IC LATCH 16BIT LV D 48-TSSOP 集成电路（IC） 锁存器

Low Voltage 16-Bit Transparent Latch with Bushold

General Description The VCXH16373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear to be transparent to the data when the Latch Enable (LE) is HIGH. When LE is LOW, the data that meets t

Low?뭋oltage 1.8/2.5/3.3 V 16?묪it Transparent Latch

Low−Voltage 1.8/2.5/3.3 V 16−Bit Transparent Latch With 3.6 V−Tolerant Inputs and Outputs (3−State, Non−Inverting) The 74VCXH16373 is an advanced performance, non−inverting 16−bit transparent latch. It is designed for very high−speed, very low−power operation in 1.8 V, 2.5 V or 3.3 V systems. Th

SYMMETRICAL OUTPUT IMPEDANCE

DESCRIPTION The 74VCXH16373 is a low voltage CMOS 16 BIT D-TYPE LATCH with 3 STATE OUTPUTS NON INVERTING fabricated with sub-micron silicon gate and five-layer metal wiring C2MOS technology. It is ideal for low power and very high speed 2.3 to 3.6V applications; it can be interfaced to 3.6V signa

Low?뭋oltage 1.8/2.5/3.3 V 16?묪it Transparent Latch

Low−Voltage 1.8/2.5/3.3 V 16−Bit Transparent Latch With 3.6 V−Tolerant Inputs and Outputs (3−State, Non−Inverting) The 74VCXH16373 is an advanced performance, non−inverting 16−bit transparent latch. It is designed for very high−speed, very low−power operation in 1.8 V, 2.5 V or 3.3 V systems. Th

Low?뭋oltage 1.8/2.5/3.3 V 16?묪it Transparent Latch

Low−Voltage 1.8/2.5/3.3 V 16−Bit Transparent Latch With 3.6 V−Tolerant Inputs and Outputs (3−State, Non−Inverting) The 74VCXH16373 is an advanced performance, non−inverting 16−bit transparent latch. It is designed for very high−speed, very low−power operation in 1.8 V, 2.5 V or 3.3 V systems. Th