Low Voltage Octal Latch with 3-STATE Outputs

General Description The LVX573 is a high-speed octal latch with buffered common Latch Enable (LE) and buffered common Output Enable (OE) inputs. The LVX573 is functionally identical to the LVX373 but with inputs and outputs on opposite sides of the package. The inputs tolerate up to 7V allowing i

Low Voltage Octal Latch

文件：198.84 Kbytes Page：9 Pages

封装/外壳：20-SOIC（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC LATCH OCTAL LV 3STATE 20SOP 集成电路（IC） 锁存器

LOW VOLTAGE CMOS OCTAL D-TYPE LATCH (3-STATE NON INV.) WITH 5V TOLERANT INPUTS

DESCRIPTION The 74LVX573 is a low voltage CMOS OCTAL D-TYPE LATCH with 3 STATE OUTPUT NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications. ■ HIGH SPEED: tPD=6.4

Low Voltage Octal Latch with 3-STATE Outputs

General Description The LVX573 is a high-speed octal latch with buffered common Latch Enable (LE) and buffered common Output Enable (OE) inputs. The LVX573 is functionally identical to the LVX373 but with inputs and outputs on opposite sides of the package. The inputs tolerate up to 7V allowing i

LOW VOLTAGE CMOS OCTAL D-TYPE LATCH (3-STATE NON INV.) WITH 5V TOLERANT INPUTS

文件：299.88 Kbytes Page：13 Pages

Low Voltage Octal Latch

文件：198.84 Kbytes Page：9 Pages

Low Voltage Octal Latch with 3-STATE Outputs

General Description The LVX573 is a high-speed octal latch with buffered common Latch Enable (LE) and buffered common Output Enable (OE) inputs. The LVX573 is functionally identical to the LVX373 but with inputs and outputs on opposite sides of the package. The inputs tolerate up to 7V allowing i

封装/外壳：20-SOIC（0.209"，5.30mm 宽） 包装：管件 描述：IC LATCH OCTAL LV 3STATE 20SOP 集成电路（IC） 锁存器

Low Voltage Octal Latch with 3-STATE Outputs

General Description The LVX573 is a high-speed octal latch with buffered common Latch Enable (LE) and buffered common Output Enable (OE) inputs. The LVX573 is functionally identical to the LVX373 but with inputs and outputs on opposite sides of the package. The inputs tolerate up to 7V allowing i