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74LVT573价格
参考价格：￥1.3415
型号：74LVT573D,118 品牌：Philips Semiconducto 备注：这里有74LVT573多少钱，2026年最近7天走势，今日出价，今日竞价，74LVT573批发/采购报价，74LVT573行情走势销售排行榜，74LVT573报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
74LVT573 | 3.3V Octal D-type transparent latch 3-State DESCRIPTION The LVT573 is a high-performance BiCMOS product designed for VCC operation at 3.3V. This device is an octal transparent latch coupled to eight 3-State output buffers. The two sections of the device are controlled independently by Enable (E) and Output Enable (OE) control gates. The 74 | PHILIPS 飞利浦 |   | |
74LVT573 | Low Voltage Octal Transparent Latch with 3-STATE Outputs General Description The LVT573 and LVTH573 consist of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When LE is low, the data satisfying the input timing requirements is latched. Data appears on | FAIRCHILD 仙童半导体 | | |
74LVT573 | 3.3 V octal D-type transparent latch; (3-state) | ETC 知名厂家 | ETC | |
74LVT573 | 3.3 V octal D-type transparent latch; 3-state 1. General description The 74LVT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change ea | NEXPERIA 安世 | | |
74LVT573 | 低压八路透明锁存器（带3态输出） | ONSEMI 安森美半导体 | | |
74LVT573 | Low Voltage Octal Transparent Latch 文件：342.39 Kbytes Page：13 Pages | ONSEMI 安森美半导体 | | |
3.3 V octal D-type transparent latch; 3-state 1. General description The 74LVT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change ea | NEXPERIA 安世 | | ||
3.3 V octal D-type transparent latch; (3-state) | ETC 知名厂家 | ETC | | |
3.3 V octal D-type transparent latch; (3-state) | ETC 知名厂家 | ETC | | |
3.3V Octal D-type transparent latch 3-State DESCRIPTION The LVT573 is a high-performance BiCMOS product designed for VCC operation at 3.3V. This device is an octal transparent latch coupled to eight 3-State output buffers. The two sections of the device are controlled independently by Enable (E) and Output Enable (OE) control gates. The 74 | PHILIPS 飞利浦 | | ||
3.3 V octal D-type transparent latch; 3-state 1. General description The 74LVT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change ea | NEXPERIA 安世 | | ||
3.3V Octal D-type transparent latch 3-State DESCRIPTION The LVT573 is a high-performance BiCMOS product designed for VCC operation at 3.3V. This device is an octal transparent latch coupled to eight 3-State output buffers. The two sections of the device are controlled independently by Enable (E) and Output Enable (OE) control gates. The 74 | PHILIPS 飞利浦 | | ||
3.3 V octal D-type transparent latch; (3-state) | ETC 知名厂家 | ETC | | |
Low Voltage Octal Transparent Latch with 3-STATE Outputs General Description The LVT573 and LVTH573 consist of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When LE is low, the data satisfying the input timing requirements is latched. Data appears on | FAIRCHILD 仙童半导体 | | ||
Low Voltage Octal Transparent Latch with 3-STATE Outputs General Description The LVT573 and LVTH573 consist of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When LE is low, the data satisfying the input timing requirements is latched. Data appears on | FAIRCHILD 仙童半导体 | | ||
Low Voltage Octal Transparent Latch with 3-STATE Outputs General Description The LVT573 and LVTH573 consist of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When LE is low, the data satisfying the input timing requirements is latched. Data appears on | FAIRCHILD 仙童半导体 | | ||
Low Voltage Octal Transparent Latch with 3-STATE Outputs General Description The LVT573 and LVTH573 consist of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When LE is low, the data satisfying the input timing requirements is latched. Data appears on | FAIRCHILD 仙童半导体 | | ||
Low Voltage Octal Transparent Latch with 3-STATE Outputs General Description The LVT573 and LVTH573 consist of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When LE is low, the data satisfying the input timing requirements is latched. Data appears on | FAIRCHILD 仙童半导体 | | ||
3.3 V octal D-type transparent latch; (3-state) | ETC 知名厂家 | ETC | | |
3.3V Octal D-type transparent latch 3-State DESCRIPTION The LVT573 is a high-performance BiCMOS product designed for VCC operation at 3.3V. This device is an octal transparent latch coupled to eight 3-State output buffers. The two sections of the device are controlled independently by Enable (E) and Output Enable (OE) control gates. The 74 | PHILIPS 飞利浦 | | ||
3.3 V octal D-type transparent latch; 3-state 1. General description The 74LVT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change ea | NEXPERIA 安世 | | ||
3.3V Octal D-type transparent latch 3-State DESCRIPTION The LVT573 is a high-performance BiCMOS product designed for VCC operation at 3.3V. This device is an octal transparent latch coupled to eight 3-State output buffers. The two sections of the device are controlled independently by Enable (E) and Output Enable (OE) control gates. The 74 | PHILIPS 飞利浦 | | ||
Low Voltage Octal Transparent Latch with 3-STATE Outputs General Description The LVT573 and LVTH573 consist of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When LE is low, the data satisfying the input timing requirements is latched. Data appears on | FAIRCHILD 仙童半导体 | | ||
Low Voltage Octal Transparent Latch with 3-STATE Outputs General Description The LVT573 and LVTH573 consist of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When LE is low, the data satisfying the input timing requirements is latched. Data appears on | FAIRCHILD 仙童半导体 | | ||
Low Voltage Octal Transparent Latch with 3-STATE Outputs General Description The LVT573 and LVTH573 consist of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When LE is low, the data satisfying the input timing requirements is latched. Data appears on | FAIRCHILD 仙童半导体 | | ||
Low Voltage Octal Transparent Latch with 3-STATE Outputs General Description The LVT573 and LVTH573 consist of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When LE is low, the data satisfying the input timing requirements is latched. Data appears on | FAIRCHILD 仙童半导体 | | ||
3.3 V octal D-type transparent latch; 3-state 文件：323.46 Kbytes Page：17 Pages | PHILIPS 飞利浦 | | ||
3.3 V octal D-type transparent latch; 3-state | NEXPERIA 安世 | | ||
封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：管件 描述：IC OCTAL D TRANSP LATCH 20SOIC 集成电路（IC） 锁存器 | ETC 知名厂家 | ETC | | |
封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：管件 描述：IC OCTAL D TRANSP LATCH 20SOIC 集成电路（IC） 锁存器 | ETC 知名厂家 | ETC | | |
3.3 V octal D-type transparent latch; 3-state | NEXPERIA 安世 | | ||
Low Voltage Octal Transparent Latch 文件：342.39 Kbytes Page：13 Pages | ONSEMI 安森美半导体 | | ||
Low Voltage Octal Transparent Latch 文件：342.39 Kbytes Page：13 Pages | ONSEMI 安森美半导体 | | ||
Low Voltage Octal Transparent Latch 文件：342.39 Kbytes Page：13 Pages | ONSEMI 安森美半导体 | | ||
Low Voltage Octal Transparent Latch 文件：342.39 Kbytes Page：13 Pages | ONSEMI 安森美半导体 | |
74LVT573产品属性
- 类型
描述
- 型号
74LVT573
- 制造商
NXP Semiconductors
- 功能描述
IC OCT D TYPE LATCH 3-ST DH
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
FAIRCHILD/仙童 |
24+ |
TSSOP |
101 |
大批量供应优势库存热卖 |
|||
PHI |
18+ |
SSOP20 |
85600 |
保证进口原装可开17%增值税发票 |
|||
PH |
24+ |
原厂封装 |
65250 |
支持样品,原装现货,提供技术支持! |
|||
NEXPERIA/安世 |
25+ |
SOT764-1 |
60000 |
全新原装现货库存 |
|||
FAIRCHILD/仙童 |
21+ |
TSSOP20 |
1062 |
只做原装正品,不止网上数量,欢迎电话微信查询! |
|||
PHI |
25+ |
SSOP20 |
1000 |
百分百原装正品 真实公司现货库存 本公司只做原装 可 |
|||
Nexperia |
25+ |
N/A |
20000 |
||||
onsemi(安森美) |
25+ |
SO-20P |
11580 |
正规渠道,免费送样。支持账期,BOM一站式配齐 |
|||
TI SMD |
23+ |
NA |
20000 |
全新原装假一赔十 |
|||
PHSSEMICONDUCTOR |
24+ |
NA |
80000 |
只做自己库存 全新原装进口正品假一赔百 可开13%增 |
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74LVT573规格书下载地址
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74LVT573数据表相关新闻
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2020-10-2174S02PC，74S03DC，74S03PC，74S04PC，74S05DC，74S05PC，74S08DC，74S08PC，74S109DC，74S109PC，74S10DC，74S10PC，74S112DC，74S112PC，74S113PC，74S11DC，74S11PC，74S132DC，74S132PC
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2019-12-15
DdatasheetPDF页码索引
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