Low Voltage Octal Transparent Latch with 3-STATE Outputs

General Description The LVQ373 consists of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When LE is low, the data satisfying the input timing requirements is latched. Data appears on the bus whe

封装/外壳：20-LSSOP（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC LATCH TRANSP OCT 3ST 20QSOP 集成电路（IC） 锁存器

Low Voltage Octal Transparent Latch with 3-STATE Outputs

General Description The LVQ373 consists of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When LE is low, the data satisfying the input timing requirements is latched. Data appears on the bus whe

OCTAL D-TYPE LATCH WITH 3 STATE OUTPUTS NON INVERTING

DESCRIPTION The 74LVQ373 is a low voltage CMOS OCTAL D-TYPE LATCH with 3 STATE OUTPUT NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications. These 8 bit D-Type latch are controlled by a latc

LOW VOLTAGE CMOS OCTAL D-TYPE LATCH WITH 3 STATE OUTPUTS NON INVERTING

文件：289.17 Kbytes Page：13 Pages

OCTAL D-TYPE LATCH WITH 3 STATE OUTPUTS NON INVERTING

DESCRIPTION The 74LVQ373 is a low voltage CMOS OCTAL D-TYPE LATCH with 3 STATE OUTPUT NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications. These 8 bit D-Type latch are controlled by a latc

LOW VOLTAGE CMOS OCTAL D-TYPE LATCH WITH 3 STATE OUTPUTS NON INVERTING

文件：289.17 Kbytes Page：13 Pages