Dual 2-input EXCLUSIVE-OR gate

1. General description The 74LVC2G86 is a dual 2-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of s

Dual EXCLUSIVE OR Gate

The 74LVC2G86 is a dual 2-input EXCLUSIVE OR gate with a standard push-pull output. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully specified for parti •Wide Supply Voltage Range from 1.65 to 5.5V\n•±24mA Output Drive at 3.3V\n•CMOS low power consumption\n•IOFF Supports Partial-Power-Down Mode Operation\n•Inputs accept up to 5.5V\n•Schmitt Trigger Action at all inputs make the circuit tolerant for slower input rise and fall time. The hysteresis is ;

Dual 2-input EXCLUSIVE-OR gate

Dual 2-input exclusive-OR gate

文件：82.46 Kbytes Page：15 Pages

DUAL 2-INPUT EXCLUSIVE-OR GATE

文件：510.29 Kbytes Page：11 Pages

丝印代码：V86；Dual 2-input EXCLUSIVE-OR gate

1. General description The 74LVC2G86 is a dual 2-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of s

Dual 2-input EXCLUSIVE-OR gate

The 74LVC2G86-Q100 provides a dual 2-input EXCLUSIVE-OR gate.\n Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V and 5V environment.\n This device is fully specified for partial power-down applications using IOFF. • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85°C and from -40°C to +125°C\n\n• Wide supply voltage range from 1.65 V to 5.5V\n• 5 V tolerant inputs for interfacing with 5 V logic\n• High noise immunity\n• Complies with JEDEC standard:• JESD8-7 ;

Dual 2-input EXCLUSIVE-OR gate

The 74LVC2G86 provides a dual 2-input EXCLUSIVE-OR gate.\n Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.\n This device is fully specified for partial power-down applications using IOFF. T • Wide supply voltage range from 1.65 V to 5.5 V\n• 5 V tolerant inputs for interfacing with 5 V logic\n• High noise immunity\n• Complies with JEDEC standard:• JESD8-7 (1.65 V to 1.95 V)\n• JESD8-5 (2.3 V to 2.7 V)\n• JESD8B/JESD36 (2.7 V to 3.6 V)\n\n• ESD protection:• HBM JESD22-A114F exceeds 2000;

丝印代码：V86；Dual 2-input EXCLUSIVE-OR gate

1. General description The 74LVC2G86 is a dual 2-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of s

丝印代码：VH；Dual 2-input EXCLUSIVE-OR gate

1. General description The 74LVC2G86 is a dual 2-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of s

丝印代码：VH；Dual 2-input EXCLUSIVE-OR gate

1. General description The 74LVC2G86 is a dual 2-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of s

丝印代码：VH；Dual 2-input EXCLUSIVE-OR gate

1. General description The 74LVC2G86 is a dual 2-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of s

丝印代码：V86；Dual 2-input EXCLUSIVE-OR gate

1. General description The 74LVC2G86 is a dual 2-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of s

丝印代码：VH；Dual 2-input EXCLUSIVE-OR gate

1. General description The 74LVC2G86 is a dual 2-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of s

Dual 2-input exclusive-OR gate

文件：82.46 Kbytes Page：15 Pages

Dual 2-input EXCLUSIVE-OR gate

丝印代码：V86；Dual 2-input EXCLUSIVE-OR gate

文件：785.95 Kbytes Page：14 Pages

封装/外壳：8-VFSOP（0.091"，2.30mm 宽） 包装：卷带（TR） 描述：IC GATE XOR 2CH 2-INP 8VSSOP 集成电路（IC） 门和反相器

Dual 2-input EXCLUSIVE-OR gate

Dual 2-input exclusive-OR gate

文件：82.46 Kbytes Page：15 Pages

封装/外壳：8-TSSOP，8-MSOP（0.118"，3.00mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC GATE XOR 2CH 2-INP 8TSSOP 集成电路（IC） 门和反相器

丝印代码：V86；Dual 2-input EXCLUSIVE-OR gate

文件：785.95 Kbytes Page：14 Pages

Dual 2-input EXCLUSIVE-OR gate

Dual 2-input EXCLUSIVE-OR gate

Dual 2-input exclusive-OR gate

文件：82.46 Kbytes Page：15 Pages

DUAL 2-INPUT EXCLUSIVE-OR GATE

文件：510.29 Kbytes Page：11 Pages

DUAL 2-INPUT EXCLUSIVE-OR GATE

文件：510.29 Kbytes Page：11 Pages

Dual 2-input EXCLUSIVE-OR gate

文件：785.95 Kbytes Page：14 Pages

DUAL 2-INPUT EXCLUSIVE-OR GATE

文件：510.29 Kbytes Page：11 Pages