Octal buffer/line driver with 5-volt tolerant inputs/outputs; inverting 3-State

DESCRIPTION The 74LVC240A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. FEATURES • 5 V tolerant inputs/outputs, for interfacing with 5 V logic • Supply voltage range from 1.2 to 3.6 V • Complies with JED

74LVC240: Low Voltage Octal Inverting Buffer, 3-State

The 74LVC240A is a high performance, inverting octal buffer operating from a 1.2 to 3.6 V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5 V allows 74L Designed for 1.2 V to 3.6 V VCC Operation\n5 V Tolerant − Interface Capability With 5 V TTL Logic\nSupports Live Insertion and Withdrawal\nIOFF Specification Guarantees High Impedance When VCC = 0 V\n24 mA Output Sink and Source Capability\nNear Zero Static Supply Current in All Three Logic States (;

Octal buffer/line driver with 5-volt tolerant inputs/outputs; inverting 3-State

DESCRIPTION The 74LVC240A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. FEATURES • 5 V tolerant inputs/outputs, for interfacing with 5 V logic • Supply voltage range from 1.2 to 3.6 V • Complies with JED

Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-state

The 74LVC240A is an octal inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Schmitt trigger action at all inputs makes the circuit highly tolerant of sl • 5 V tolerant inputs/outputs for interfacing with 5 V logic\n• Supply voltage range from 1.2 to 3.6 V\n• CMOS low power consumption\n• Direct interface with TTL levels\n• High-impedance when VCC = 0 V\n• Complies with JEDEC standard:• JESD8-7A (1.65 V to 1.95 V)\n• JESD8-5A (2.3 V to 2.7 V)\n• JESD;

Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-state

The 74LVC240A is an octal inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Schmitt trigger action at all inputs makes the circuit highly tolerant of sl • 5 V tolerant inputs/outputs for interfacing with 5 V logic\n• Supply voltage range from 1.2 to 3.6 V\n• CMOS low power consumption\n• Direct interface with TTL levels\n• High-impedance when VCC = 0 V\n• Complies with JEDEC standard:• JESD8-7A (1.65 V to 1.95 V)\n• JESD8-5A (2.3 V to 2.7 V)\n• JESD;

Octal buffer/line driver with 5-volt tolerant inputs/outputs; inverting 3-State

DESCRIPTION The 74LVC240A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. FEATURES • 5 V tolerant inputs/outputs, for interfacing with 5 V logic • Supply voltage range from 1.2 to 3.6 V • Complies with JED

Octal buffer/line driver with 5-volt tolerant inputs/outputs; inverting 3-State

DESCRIPTION The 74LVC240A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. FEATURES • 5 V tolerant inputs/outputs, for interfacing with 5 V logic • Supply voltage range from 1.2 to 3.6 V • Complies with JED

Octal buffer/line driver with 5-volt tolerant inputs/outputs; inverting 3-State

DESCRIPTION The 74LVC240A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. FEATURES • 5 V tolerant inputs/outputs, for interfacing with 5 V logic • Supply voltage range from 1.2 to 3.6 V • Complies with JED

Low-Voltage CMOS Quad 2-Input NAND Gate

文件：94.16 Kbytes Page：9 Pages

SINGLE 2 INPUT POSITIVE NAND GATE

文件：472.64 Kbytes Page：10 Pages

Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-state

文件：265.86 Kbytes Page：17 Pages

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC BUFFER INVERT 3.6V 20SO 集成电路（IC） 缓冲器，驱动器，接收器，收发器

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC BUFFER INVERT 3.6V 20SO 集成电路（IC） 缓冲器，驱动器，接收器，收发器

Low-Voltage CMOS Quad 2-Input NAND Gate

文件：94.16 Kbytes Page：9 Pages

SINGLE 2 INPUT POSITIVE NAND GATE

文件：472.64 Kbytes Page：10 Pages

SINGLE 2 INPUT POSITIVE NAND GATE

文件：472.64 Kbytes Page：10 Pages