Single buffer

1. General description The 74LVC1G34 is a single buffer. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise a

SINGLE BUFFER GATE

Features » Operate from 1.65V to 5.5V « Inputs Accept Voltages To 5.5V High Noise Immunity « Low Power Dissipation » ESD Protection Exceeds JESD 22 -2000-V Human-Body Model (A114-A) ~1000-V Charged-Device Model (C101)

Single-gate

The 74LVC1G34 is a single buffer gate with a standard push-pull output. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully specified for partial power dow •Wide Supply Voltage Range from 1.65 to 5.5V\n•± 24mA Output Drive at 3.3V\n•CMOS low power consumption\n•IOFF Supports Partial-Power-Down Mode Operation\n•Inputs accept up to 5.5V\n•ESD Protection Tested per JESD 22\n•Exceeds 200-V Machine Model (A115-A)\n•Exceeds 2000-V Human Body Model (A114-A)\n;

Single Buffer Gate in bare die form

文件：484.72 Kbytes Page：6 Pages

Single buffer

SINGLE BUFFER GATE

文件：438.25 Kbytes Page：15 Pages

丝印代码：YN；Single buffer

1. General description The 74LVC1G34 is a single buffer. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise a

Single buffer

The 74LVC1G34 provides a low-power, low-voltage single buffer.\n The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.\n This device is fully specified for partial power-down applications using IOFF. The IOFF • Wide supply voltage range from 1.65 V to 5.5 V\n• 5 V tolerant inputs for interfacing with 5 V logic\n• High noise immunity\n• Complies with JEDEC standard:• JESD8-7 (1.65 V to 1.95 V)\n• JESD8-5 (2.3 V to 2.7 V)\n• JESD8-B/JESD36 (2.7 V to 3.6 V).\n\n• ESD protection:• HBM: ANSI/ESDA/JEDEC JS-001;

Single buffer

The 74LVC1G34 provides a low-power, low-voltage single buffer.\n The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.\n This device is fully specified for partial power-down applications using IOFF. The IOFF • Wide supply voltage range from 1.65 V to 5.5 V\n• 5 V tolerant inputs for interfacing with 5 V logic\n• High noise immunity\n• Complies with JEDEC standard:• JESD8-7 (1.65 V to 1.95 V)\n• JESD8-5 (2.3 V to 2.7 V)\n• JESD8-B/JESD36 (2.7 V to 3.6 V).\n\n• ESD protection:• HBM: ANSI/ESDA/JEDEC JS-001;

丝印代码：YN；Single buffer

1. General description The 74LVC1G34 is a single buffer. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise a

丝印代码：YN；Single buffer

1. General description The 74LVC1G34 is a single buffer. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise a

丝印代码：YN；Single buffer

1. General description The 74LVC1G34 is a single buffer. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise a

丝印代码：YN；Single buffer

1. General description The 74LVC1G34-Q100 is a single buffer. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input r

丝印代码：YN；Single buffer

1. General description The 74LVC1G34 is a single buffer. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise a

丝印代码：YN；Single buffer

1. General description The 74LVC1G34-Q100 is a single buffer. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input r

丝印代码：YN；Single buffer

1. General description The 74LVC1G34 is a single buffer. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise a

丝印代码：YN；Single buffer

1. General description The 74LVC1G34 is a single buffer. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise a

丝印代码：YN；Single buffer

1. General description The 74LVC1G34-Q100 is a single buffer. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input r

SINGLE BUFFER GATE

Features  Grade 1 Ambient Temperature Operation: -40°C to +125°C  Wide Supply Voltage Range from 1.65V to 5.5V  ± 24mA Output Drive at 3.3V  CMOS Low Power Consumption  IOFF Supports Partial-Power-Down Mode Operation  Inputs Accept up to 5.5V Regardless of VCC Level  ESD Protection T

Single buffer

1. General description The 74LVC1G34-Q100 is a single buffer. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input r

Single buffer

1. General description The 74LVC1G34-Q100 is a single buffer. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input r

丝印代码：UKQ；SINGLE BUFFER GATE

Features  Grade 1 Ambient Temperature Operation: -40°C to +125°C  Wide Supply Voltage Range from 1.65V to 5.5V  ± 24mA Output Drive at 3.3V  CMOS Low Power Consumption  IOFF Supports Partial-Power-Down Mode Operation  Inputs Accept up to 5.5V Regardless of VCC Level  ESD Protection T

丝印代码：UKQ；SINGLE BUFFER GATE

Features  Grade 1 Ambient Temperature Operation: -40°C to +125°C  Wide Supply Voltage Range from 1.65V to 5.5V  ± 24mA Output Drive at 3.3V  CMOS Low Power Consumption  IOFF Supports Partial-Power-Down Mode Operation  Inputs Accept up to 5.5V Regardless of VCC Level  ESD Protection T

SINGLE BUFFER GATE

Features » Operate from 1.65V to 5.5V « Inputs Accept Voltages To 5.5V High Noise Immunity « Low Power Dissipation » ESD Protection Exceeds JESD 22 -2000-V Human-Body Model (A114-A) ~1000-V Charged-Device Model (C101)

SINGLE BUFFER GATE

Features » Operate from 1.65V to 5.5V « Inputs Accept Voltages To 5.5V High Noise Immunity « Low Power Dissipation » ESD Protection Exceeds JESD 22 -2000-V Human-Body Model (A114-A) ~1000-V Charged-Device Model (C101)

丝印代码：YV；SINGLE BUFFER GATE

文件：438.25 Kbytes Page：15 Pages

丝印代码：UK；SINGLE BUFFER GATE

文件：438.25 Kbytes Page：15 Pages

封装/外壳：6-XFDFN 包装：卷带（TR）卷带（TR） 描述：IC BUF NON-INVERT 5.5V 6X2DFN 集成电路（IC） 缓冲器，驱动器，接收器，收发器

封装/外壳：6-XFDFN 包装：卷带（TR）卷带（TR） 描述：IC BUFFER NON-INVERT 5.5V 6DFN 集成电路（IC） 缓冲器，驱动器，接收器，收发器

SINGLE BUFFER GATE

文件：438.25 Kbytes Page：15 Pages

丝印代码：MK；SINGLE BUFFER GATE

文件：438.25 Kbytes Page：15 Pages

丝印代码：UK；SINGLE BUFFER GATE

文件：438.25 Kbytes Page：15 Pages

Single buffer

Single buffer

Single buffer

丝印代码：YN；Single buffer

文件：780.42 Kbytes Page：13 Pages

Single buffer

丝印代码：YN；Single buffer

文件：780.42 Kbytes Page：13 Pages

Single buffer

文件：780.42 Kbytes Page：13 Pages

丝印代码：UK***；SINGLE BUFFER GATE

文件：438.25 Kbytes Page：15 Pages

丝印代码：UK***；SINGLE BUFFER GATE

文件：438.25 Kbytes Page：15 Pages

丝印代码：UK***；SINGLE BUFFER GATE

文件：438.25 Kbytes Page：15 Pages

SINGLE BUFFER GATE

文件：371.74 Kbytes Page：14 Pages

SINGLE BUFFER GATE

文件：371.74 Kbytes Page：14 Pages

SINGLE BUFFER GATE

文件：371.74 Kbytes Page：14 Pages

SINGLE BUFFER GATE

文件：371.74 Kbytes Page：14 Pages

SINGLE BUFFER GATE

文件：371.74 Kbytes Page：14 Pages