Presettable synchronous 4-bit binary counter; asynchronous reset

DESCRIPTION The 74LVC161 is a high–performance, low–power, low–voltage, Si–gate CMOS device and superior to most advanced CMOS compatible TTL families. FEATURES • Wide supply voltage range of 1.2 V to 3.6 V • In accordance with JEDEC standard no. 8–1A • Inputs accept voltages up to 5.5 V • C

Presettable synchronous 4-bit binary counter; asynchronous reset

1. General description The 74LVC161 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset

19-BIT BUS INTERFACE

1.4-kΩ Pullup Resistors Integrated on All Open-Drain Outputs Eliminate the Need for Discrete Resistors ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Designed for the IEEE Std 1284-I (Level 1 Type) and IEEE Std 1284-II (Leve

19-BIT BUS INTERFACE

1.4-kΩ Pullup Resistors Integrated on All Open-Drain Outputs Eliminate the Need for Discrete Resistors ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Designed for the IEEE Std 1284-I (Level 1 Type) and IEEE Std 1284-II (Leve

19-BIT BUS INTERFACE

1.4-kΩ Pullup Resistors Integrated on All Open-Drain Outputs Eliminate the Need for Discrete Resistors ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Designed for the IEEE Std 1284-I (Level 1 Type) and IEEE Std 1284-II (Leve

Presettable synchronous 4-bit binary counter; asynchronous reset

1. General description The 74LVC161 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset

Presettable synchronous 4-bit binary counter; asynchronous reset

1. General description The 74LVC161 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset

Presettable synchronous 4-bit binary counter; asynchronous reset

DESCRIPTION The 74LVC161 is a high–performance, low–power, low–voltage, Si–gate CMOS device and superior to most advanced CMOS compatible TTL families. FEATURES • Wide supply voltage range of 1.2 V to 3.6 V • In accordance with JEDEC standard no. 8–1A • Inputs accept voltages up to 5.5 V • C

Presettable synchronous 4-bit binary counter; asynchronous reset

DESCRIPTION The 74LVC161 is a high–performance, low–power, low–voltage, Si–gate CMOS device and superior to most advanced CMOS compatible TTL families. FEATURES • Wide supply voltage range of 1.2 V to 3.6 V • In accordance with JEDEC standard no. 8–1A • Inputs accept voltages up to 5.5 V • C

Presettable synchronous 4-bit binary counter; asynchronous reset

DESCRIPTION The 74LVC161 is a high–performance, low–power, low–voltage, Si–gate CMOS device and superior to most advanced CMOS compatible TTL families. FEATURES • Wide supply voltage range of 1.2 V to 3.6 V • In accordance with JEDEC standard no. 8–1A • Inputs accept voltages up to 5.5 V • C

Presettable synchronous 4-bit binary counter; asynchronous reset

1. General description The 74LVC161 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset

Presettable synchronous 4-bit binary counter; asynchronous reset

DESCRIPTION The 74LVC161 is a high–performance, low–power, low–voltage, Si–gate CMOS device and superior to most advanced CMOS compatible TTL families. FEATURES • Wide supply voltage range of 1.2 V to 3.6 V • In accordance with JEDEC standard no. 8–1A • Inputs accept voltages up to 5.5 V • C

LOW VOLTAGE HIGH SPEED IEEE1284 TRANSCEIVER

文件：217.61 Kbytes Page：11 Pages

19-BIT BUS INTERFACE

文件：206.13 Kbytes Page：12 Pages

19-BIT BUS INTERFACE

文件：206.13 Kbytes Page：12 Pages

19-BIT BUS INTERFACE

文件：206.13 Kbytes Page：12 Pages

封装/外壳：48-BSSOP（0.295"，7.50mm 宽） 包装：管件 描述：IC 19BIT BUS INTERFACE 48-SSOP 集成电路（IC） 专用逻辑器件

LOW VOLTAGE HIGH SPEED IEEE1284 TRANSCEIVER

文件：217.61 Kbytes Page：11 Pages

封装/外壳：48-TFSOP（0.240"，6.10mm 宽） 包装：管件 描述：IC TXRX LV HS IEEE 1284 48-TSSOP 集成电路（IC） 专用逻辑器件

Presettable synchronous 4-bit binary counter; asynchronous reset

Presettable synchronous 4-bit binary counter; asynchronous reset

Presettable synchronous 4-bit binary counter; asynchronous reset