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74LVC02APW价格

参考价格:¥0.4759

型号:74LVC02APW,112 品牌:NXP Semiconductors 备注:这里有74LVC02APW多少钱,2026年最近7天走势,今日出价,今日竞价,74LVC02APW批发/采购报价,74LVC02APW行情走势销售排行榜,74LVC02APW报价。
型号 功能描述 生产厂家 企业 LOGO 操作
74LVC02APW

Quad 2-input NOR gate

DESCRIPTION The 74LVC02A is a high performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V/5 V environm

PHILIPS

飞利浦

74LVC02APW

Quad 2-input NOR gate

ETC

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74LVC02APW

Quad 2-input NOR gate

1. General description The 74LVC02A is a quad-input NOR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input r

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74LVC02APW

Quad 2-input NOR gate

The 74LVC02A provides four 2-input NOR gates.\n Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications. • 5 V tolerant inputs for interfacing with 5 V logic\n• Wide supply voltage range from 1.2 V to 3.6 V\n• CMOS low power consumption\n• Direct interface with TTL levels\n• Complies with JEDEC standard:• JESD8-7A (1.65 V to 1.95 V)\n• JESD8-5A (2.3 V to 2.7 V)\n• JESD8-C/JESD36 (2.7 V to 3.6 V)\n\n• E;

NEXPERIA

安世

Quad 2-input NOR gate

DESCRIPTION The 74LVC02A is a high performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V/5 V environm

PHILIPS

飞利浦

Quad 2-input NOR gate

General description The 74LVC02A-Q100 provides four 2-input NOR gates. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications. This product has been qualified to the Automotive Electronics Council (A

NEXPERIA

安世

Quad 2-input NOR gate

The 74LVC02A-Q100 provides four 2-input NOR gates.\n Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.\n This product has been qualified to the Automotive Electronics Council (AEC) standard Q1 • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• 5 V tolerant inputs for interfacing with 5 V logic\n• Wide supply voltage range from 1.2 V to 3.6 V\n• CMOS low power consumption\n• Direct interface with TTL lev;

NEXPERIA

安世

封装/外壳:14-TSSOP(0.173",4.40mm 宽) 包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 描述:IC GATE NOR 4CH 2-INP 14TSSOP 集成电路(IC) 门和反相器

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封装/外壳:14-TSSOP(0.173",4.40mm 宽) 包装:管件 描述:IC GATE NOR 4CH 2-INP 14TSSOP 集成电路(IC) 门和反相器

ETC

知名厂家

Quad 2-input NOR gate

DESCRIPTION The 74LVC02A is a high performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V/5 V environm

PHILIPS

飞利浦

Quad 2-input NOR gate

DESCRIPTION The 74LVC02A is a high performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V/5 V environm

PHILIPS

飞利浦

Quad 2-input NOR gate

DESCRIPTION The 74LVC02A is a high performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V/5 V environm

PHILIPS

飞利浦

74LVC02APW产品属性

  • 类型

    描述

  • VCC (V):

    1.2 - 3.6

  • Logic switching levels:

    TTL

  • Output drive capability (mA):

    ± 24

  • tpd (ns):

    2.1

  • fmax (MHz):

    150

  • Nr of bits:

    4

  • Power dissipation considerations:

    low

  • Tamb (°C):

    -40~125

  • Rth(j-a) (K/W):

    143

  • Ψth(j-top) (K/W):

    8.6

  • Rth(j-c) (K/W):

    70

  • Package name:

    TSSOP14

更新时间:2026-8-4 12:11:00
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一级代理-主营优势-实惠价格-不悔选择
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公司存货

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