Quad 2-input NAND gate

DESCRIPTION The 74LV03 is a low–voltage Si–gate CMOS device and is pin and function compatible with 74HC/HCT03. The 74LV03 provides the 2–input NAND function. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0 to 3.6V • Accepts TTL input levels betwe

Quad 2-input NAND gate

1 General description The 74LV03 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT03. The 74LV03 provides the 2-input NAND function. The 74LV03 has open-drain N-transistor outputs, which are not clamped by a diode connected to VCC. In the OFF-state, i.e., w

Quad 2-input NAND gate

DESCRIPTION The 74LV03 is a low–voltage Si–gate CMOS device and is pin and function compatible with 74HC/HCT03. The 74LV03 provides the 2–input NAND function. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0 to 3.6V • Accepts TTL input levels betwe

Quad 2-input NAND gate

1 General description The 74LV03 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT03. The 74LV03 provides the 2-input NAND function. The 74LV03 has open-drain N-transistor outputs, which are not clamped by a diode connected to VCC. In the OFF-state, i.e., w

Quad 2-input NAND gate

The 74LV03 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT03.\n The 74LV03 provides the 2-input NAND function.\n The 74LV03 has open-drain N-transistor outputs, which are not clamped by a diode connected to VCC. In the OFF-state, i.e., when one input is LO • Wide operating voltage: 1.0 V to 5.5 V\n• Optimized for low voltage applications: 1.0 V to 3.6 V\n• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V\n• Typical VOLP (output ground bounce) < 0.8 V @ VCC = 3.3 V, Tamb = 25 °C\n• Typical VOHV (output VOH undershoot) > 2 V @ VCC = 3.3 V, T;

Quad 2-input NAND gate

DESCRIPTION The 74LV03 is a low–voltage Si–gate CMOS device and is pin and function compatible with 74HC/HCT03. The 74LV03 provides the 2–input NAND function. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0 to 3.6V • Accepts TTL input levels betwe

Quad 2-input NAND gate

The 74LV03-Q100 is a quad 2-input NAND gate with open-drain outputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC.\n This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1

Quad 2-input NAND gate

DESCRIPTION The 74LV03 is a low–voltage Si–gate CMOS device and is pin and function compatible with 74HC/HCT03. The 74LV03 provides the 2–input NAND function. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0 to 3.6V • Accepts TTL input levels betwe

Quad 2-input NAND gate

DESCRIPTION The 74LV03 is a low–voltage Si–gate CMOS device and is pin and function compatible with 74HC/HCT03. The 74LV03 provides the 2–input NAND function. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0 to 3.6V • Accepts TTL input levels betwe

Quad 2-input NAND gate

DESCRIPTION The 74LV03 is a low–voltage Si–gate CMOS device and is pin and function compatible with 74HC/HCT03. The 74LV03 provides the 2–input NAND function. FEATURES • Wide operating voltage: 1.0 to 5.5V • Optimized for Low Voltage applications: 1.0 to 3.6V • Accepts TTL input levels betwe

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC GATE NAND 4CH 2-INP 14SO 集成电路（IC） 门和反相器

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC GATE NAND 4CH 2-INP 14SO 集成电路（IC） 门和反相器