SYNCHRONOUS 4-BIT UP/DOWN COUNTER

SYNCHRONOUS 4-BIT UP/DOWN COUNTER The SN54 /74LS669 is a synchronous 4-bit up/down counter. The LS669 is a 4-bit binary counter. For high speed counting applications, this presettable counter features an internal carry lookahead for cascading purposes. By clocking all flip-flops simultaneousl

OCTAL BUFFER/LINE DRIVERS WITH 3-STATE OUTPUT(NONINVERTED)

Decade and Binary Counters

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OCTAL BUFFER/LINE DRIVERS WITH 3-STATE OUTPUT(NONINVERTED)

Quad 2-Input NAND Gate

General Description This device contains four independent gates each of which performs the logic NAND function.

QUAD 2-INPUT NAND GATE

QUAD 2-INPUT NAND GATES

Quad 2-Input NAND Gate

General Description This device contains four independent gates each of which performs the logic NAND function.

QUAD 2-INPUT NAND GATE

QUAD 2-INPUT NAND GATES

QUAD 2-INPUT NAND GATE

QUAD 2-INPUT NAND GATES

Quad 2-Input NAND Gate?

Quad 2-Input NAND Gate • ESD > 3500 Volts

QUAD 2-INPUT NAND GATE

Low Power Schottky

Quad 2-Input NAND Gate

General Description This device contains four independent gates each of which performs the logic NAND function.

QUAD 2-INPUT NAND GATE

QUAD 2-INPUT NAND GATES

QUAD 2-INPUT NAND GATE

QUAD 2-INPUT NAND GATE • ESD > 3500 Volts

Quadruple 2-input Positive NAND Gates(with Open Collector Outputs)

● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....)

Quadruple 2-input Positive NOR Gates

● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....)

Quad 2-Input NOR Gate

General Description This device contains four independent gates each of which performs the logic NOR function.

Quad 2-Input NOR Gate

General Description This device contains four independent gates each of which performs the logic NOR function.

Quad 2-Input NOR Gate

General Description This device contains four independent gates each of which performs the logic NOR function.

Quadruple 2-Input Positive NOR Gates

Quad 2-Input NAND Gates with Open-Collector Outputs

General Description This device contains four independent gates each of which performs the logic NAND function. The open-collector outputs require external pull-up resistors for proper logical operation.

Quadruple 2-input Positive NAND Gates(with Open Colletor Outputs)

● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....)

Quad 2-Input NAND Gates with Open-Collector Outputs

General Description This device contains four independent gates each of which performs the logic NAND function. The open-collector outputs require external pull-up resistors for proper logical operation.

HEX INVERTER

HEX INVERTER LOW POWER SCHOTTKY

LOW POWER SCHOTTKY

Hex Inverter LOW POWER SCHOTTKY

Hex Inverting Gates

General Description This device contains six independent gates each of which performs the logic INVERT function.

Low Power Schottky Logic

Features High speed – 19ns (Typ) propagation delay Direct drop-in replacement for obsolete components in long term programs.

Hex Inverting Gates

General Description This device contains six independent gates each of which performs the logic INVERT function.

Hex Inverters(with Open Collector Outputs)

● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....)

HEX INVERTER

HEX INVERTER LOW POWER SCHOTTKY

Low Power Schottky Logic

Features High speed – 19ns (Typ) propagation delay Direct drop-in replacement for obsolete components in long term programs.

HEX INVERTER

HEX INVERTER LOW POWER SCHOTTKY

Hex Inverters / Hex Inverters (with Open Collector Outputs)

Hex Inverters / Hex Inverters (with Open Collector Outputs)

HEX INVERTER

HEX INVERTER LOW POWER SCHOTTKY

LOW POWER SCHOTTKY

Hex Inverter LOW POWER SCHOTTKY

HEX INVERTER

HEX INVERTER

Hex Inverters with Open-Drain Outputs

This device contains idenpendent inverts. It performs the Boolean function Y=A. The open collector outputs require pull-up resistor to perform correctly. Open-collector devices are often used to generate higher VOH levels.

Hex Inverters with Open-Collector Outputs

General Description This device contains six independent gates each of which performs the logic INVERT function. The open-collector outputs require external pull-up resistors for proper logical operation.

Hex Inverters with Open-Collector Outputs

General Description This device contains six independent gates each of which performs the logic INVERT function. The open-collector outputs require external pull-up resistors for proper logical operation.

Hex Inverters(with Open Collector Outputs)

● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....)

Hex Inverted Buffers with Open-Collector Outputs

Hex Inverted Buffers with Open-Collector Outputs This device contains hex inverted buffers with open-collector. It performs the Boolean function Y=A in positive Logic. • High Output Voltage (30 V) • High Speed ( tPD = 8.5 ns typical) • Low Power Dissipation (PD = 18 mW per Gate)

HEX INVERTER BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS

● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....)

Hex Buffers/Drivers(With Open Collector High-Voltage Ouputs)

● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....)

Quad 2-Input AND Gates

General Description This device contains four independent gates each of which performs the logic AND function. Features ■ Alternate Military/Aerospace device (54LS08) is available. Contact a Fairchild Semiconductor Sales Office/Distributor for specifications.

Quad 2-Input AND Gates

General Description This device contains four independent gates each of which performs the logic AND function.

Quadruple 2-Input Positive AND Gates

QUAD 2-INPUT AND GATE

QUAD 2-INPUT AND GATE LOW POWER SCHOTTKY

Quad 2-Input AND Gates with Open-Collector Outputs

General Description This device contains four independent gates each of which performs the logic AND function. The open-collector outputs require external pull-up resistors for proper logical operation.

Quadruple 2-input Positive AND Gates(with Open Collector Outputs)

● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....)

TRIPLE 3-INPUT NAND GATE

TRIPLE 3-INPUT NAND GATE LOW POWER SCHOTTKY

Triple 3-Input NAND Gate

General Description This device contains three independent gates each of which performs the logic NAND function.

Triple 3-Input NAND Gate

General Description This device contains three independent gates each of which performs the logic NAND function.

DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

Package Options Include Plastic Small Outline Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Depondable Texas Instruments Quality and Reliability

LOW POWER SCHOTTKY

LOW POWER SCHOTTKY The SN74LS109A consists of two high speed completely independent transition clocked JKflip-flops.

Triple 3-Input AND Gate

General Description This device contains three independent gates each of which performs the logic AND function. Features ■ Alternate military/aerospace device (54LS11) is available. Contact a National Semiconductor Sales Office/Distributor for specifications.

TRIPLE 3-INPUT AND GATE

TRIPLE 3-INPUT AND GATE

Triple 3-Input AND Gate

General Description This device contains three independent gates each of which performs the logic AND function.

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

The SN54 /74LS112A dual JKflip-flop features individual J, K, clock, and asynchronousset and clear inputs to each flip-flop. When the clock goes HIGH,the inputs are enabled and data will be accepted. The logic level of the Jand K inputs may be allowed to change when the clock pulse is HIGH and the

Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs

General Description This device contains two independent negative-edge-trig gered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flop on the falling edge of the clock pulse. The clock triggering occurs at a voltage level and is not directly related to the tra

Dual J-K Negative-edge-triggered Flip-Flops(with Preset and Clear)

● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....)

Quad 2-Input NAND Gates

Quad 2-Input NAND Gate

Ouadruple 2-input Positive NAND Gates

Quadruple 2-Input NAND Gates

QUADRUPLE 2-INPUT POSITIVE-NAND GATES

Quadruple 2-Input NAND Gates

TRANSISTOR TRANSISTOR LOGIC

Quadruple 2input positive-nand gates

QUADRUPLE 2-INPUT POSITIVE-NAND GATES

QUADRUPLE 2-INPUT POSITIVE-NAND GATES

Quad 2-Input NAND Gate

QUADRUPLE 2-INPUT POSITIVE-NAND GATES

QUAD 2-INPUT NAND GATE

QUADRUPLE 2-INPUT POSITIVE-NAND GATES

Quad 2-Input NAND Gate

QUADRUPLE 2-INPUT POSITIVE-NAND GATES