Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs

General Description The LCX11 is a triple 3-input AND gate with buffered outputs. LCX devices are designed for low voltage (2.5V or 3.3V) operation with the added capability of interfacing to a 5V signal environment. The 74LCX11 is fabricated with advanced CMOS technology to achieve high speed o

低电压三路 3 输入 AND 门极，带 5V 耐压输入

LCX11是一款三路3输入AND门，带缓冲输出。 LCX器件设计用于低压（2.5V或3.3V）运行，并增加了与5V信号环境接口的能力。 74LCX11采用先进的CMOS技术制造，以在实现高速运行的同时保持CMOS低功耗。 •5V容差输入和输出\n•提供2.3V-3.6V VCC规格\n•6.0ns tPD最大值(VCC = 3.3V)，10 μA ICC最大值\n•掉电高阻抗输入和输出\n•±24 mA输出驱动(VCC = 3.0V)\n•实施专利噪声/电磁干扰(EMI)消减电路\n•闩锁性能超越JEDEC 78条件\n•静电放电(ESD)性能： 人体模型> 2000V 机械模型> 200V\n•Leadless DQFN package;

Low Voltage Triple 3-Input AND Gate 5V Tolerant Inputs

文件：683.62 Kbytes Page：13 Pages

低电压双 J-K 负向边触发触发器，带 5V 耐压输入

LCX112是一款双通道J-K触发器。 每个触发器具有独立的J、K、预设、清零和时钟输入，带Q、Q#输出。 此类设备为边沿敏感器件，在时钟脉冲负变换时改变状态。 预设和清零与时钟无关，通过相应输入端的低逻辑电平实现。 LCX器件设计用于低压（2.5V或3.3V）运行，并增加了与5V信号环境接口的能力。 74LCX112采用先进的CMOS技术制造，以在实现高速运行的同时保持CMOS低功耗。 •5V容许输入电压\n•提供2.3V-3.6V VCC规格\n•7.5 ns tPD最大值(VCC = 3.3V)，10 µA ICC最大值\n•掉电高阻抗输入和输出\n•±24 mA输出驱动(VCC = 3.0V)\n•实施专利噪声/电磁干扰(EMI)消减电路\n•闩锁性能超过500 mA\n•静电放电(ESD)性能： 人体模型>2000V 机械模型>2000V;

Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs

General Description The LCX112 is a dual J-K flip-flop. Each flip-flop has inde pendent J, K, PRESET, CLEAR, and CLOCK inputs with Q, Q outputs. These devices are edge sensitive and change state on the negative going transition of the clock pulse. Clear and preset are independent of the clock a

Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs

General Description The LCX112 is a dual J-K flip-flop. Each flip-flop has inde pendent J, K, PRESET, CLEAR, and CLOCK inputs with Q, Q outputs. These devices are edge sensitive and change state on the negative going transition of the clock pulse. Clear and preset are independent of the clock a

Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs

General Description The LCX112 is a dual J-K flip-flop. Each flip-flop has inde pendent J, K, PRESET, CLEAR, and CLOCK inputs with Q, Q outputs. These devices are edge sensitive and change state on the negative going transition of the clock pulse. Clear and preset are independent of the clock a

Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs

General Description The LCX112 is a dual J-K flip-flop. Each flip-flop has inde pendent J, K, PRESET, CLEAR, and CLOCK inputs with Q, Q outputs. These devices are edge sensitive and change state on the negative going transition of the clock pulse. Clear and preset are independent of the clock a

Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs

General Description The LCX112 is a dual J-K flip-flop. Each flip-flop has inde pendent J, K, PRESET, CLEAR, and CLOCK inputs with Q, Q outputs. These devices are edge sensitive and change state on the negative going transition of the clock pulse. Clear and preset are independent of the clock a

Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs

General Description The LCX112 is a dual J-K flip-flop. Each flip-flop has inde pendent J, K, PRESET, CLEAR, and CLOCK inputs with Q, Q outputs. These devices are edge sensitive and change state on the negative going transition of the clock pulse. Clear and preset are independent of the clock a

Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs

General Description The LCX11 is a triple 3-input AND gate with buffered outputs. LCX devices are designed for low voltage (2.5V or 3.3V) operation with the added capability of interfacing to a 5V signal environment. The 74LCX11 is fabricated with advanced CMOS technology to achieve high speed o

Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs

General Description The LCX11 is a triple 3-input AND gate with buffered outputs. LCX devices are designed for low voltage (2.5V or 3.3V) operation with the added capability of interfacing to a 5V signal environment. The 74LCX11 is fabricated with advanced CMOS technology to achieve high speed o

Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs

General Description The LCX11 is a triple 3-input AND gate with buffered outputs. LCX devices are designed for low voltage (2.5V or 3.3V) operation with the added capability of interfacing to a 5V signal environment. The 74LCX11 is fabricated with advanced CMOS technology to achieve high speed o

74LCX11 Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs

General Description The LCX11 is a triple 3-input AND gate with buffered outputs. LCX devices are designed for low voltage (2.5V or 3.3V) operation with the added capability of interfacing to a 5V signal environment. The 74LCX11 is fabricated with advanced CMOS technology to achieve high speed o

Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs

General Description The LCX11 is a triple 3-input AND gate with buffered outputs. LCX devices are designed for low voltage (2.5V or 3.3V) operation with the added capability of interfacing to a 5V signal environment. The 74LCX11 is fabricated with advanced CMOS technology to achieve high speed o

Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs

General Description The LCX11 is a triple 3-input AND gate with buffered outputs. LCX devices are designed for low voltage (2.5V or 3.3V) operation with the added capability of interfacing to a 5V signal environment. The 74LCX11 is fabricated with advanced CMOS technology to achieve high speed o

Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs

General Description The LCX11 is a triple 3-input AND gate with buffered outputs. LCX devices are designed for low voltage (2.5V or 3.3V) operation with the added capability of interfacing to a 5V signal environment. The 74LCX11 is fabricated with advanced CMOS technology to achieve high speed o

Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs

文件：798.97 Kbytes Page：13 Pages

Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs

文件：205.5 Kbytes Page：11 Pages

Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs

文件：205.5 Kbytes Page：11 Pages

Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs

文件：205.5 Kbytes Page：11 Pages

封装/外壳：16-TSSOP（0.173"，4.40mm 宽） 功能：设置（预设）和复位 包装：管件 描述：IC FF JK TYPE DUAL 1BIT 16TSSOP 集成电路（IC） 触发器

封装/外壳：16-TSSOP（0.173"，4.40mm 宽） 功能：设置（预设）和复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF JK TYPE DUAL 1BIT 16TSSOP 集成电路（IC） 触发器

Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs

文件：205.5 Kbytes Page：11 Pages

Low Voltage Triple 3-Input AND Gate 5V Tolerant Inputs

文件：683.62 Kbytes Page：13 Pages

Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs

文件：798.97 Kbytes Page：13 Pages

Low Voltage Triple 3-Input AND Gate 5V Tolerant Inputs

文件：683.62 Kbytes Page：13 Pages

Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs

文件：798.97 Kbytes Page：13 Pages

Low Voltage Triple 3-Input AND Gate 5V Tolerant Inputs

文件：683.62 Kbytes Page：13 Pages

Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs

文件：798.97 Kbytes Page：13 Pages

Low Voltage Triple 3-Input AND Gate 5V Tolerant Inputs

文件：683.62 Kbytes Page：13 Pages

Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs

文件：798.97 Kbytes Page：13 Pages