Phase-locked-loop with lock detector

GENERAL DESCRIPTION The 74HC/HCT7046 are high-speed Si-gate CMOS devices and are specified in compliance with JEDEC standard no. 7. FEATURES • Low power consumption • Centre frequency up to 17 MHz (typ.) at VCC= 4.5 V • Choice of two phase comparators: EXCLUSIVE-OR; edge-triggered

Phase-locked-loop with lock detector

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：托盘 描述：IC PLL W/LOCK DETECTOR 16SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：托盘 描述：IC PLL W/LOCK DETECTOR 16SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器

Phase-Locked Loop with VCO and Lock Detector

文件：302.97 Kbytes Page：26 Pages

Phase-Locked Loop with VCO and Lock Detector

文件：586.4 Kbytes Page：29 Pages

Phase-Locked Loop with VCO and Lock Detector

文件：302.97 Kbytes Page：26 Pages