Quad 2-input NAND Schmitt trigger

GENERAL DESCRIPTION The 74HC/HCT132 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT132 contain four 2-input NAND gates which accept standard input signals. They are capable

Quad 2-input NAND Schmitt trigger

1. General description The 74HC132; 74HCT132 is a quad 2-input NAND gate with Schmitt-trigger inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Schmitt trigger inputs transform slowly changing input signals

Quad 2-input NAND Schmitt trigger

The 74HC132; 74HCT132 is a quad 2-input NAND gate with Schmitt-trigger inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Schmitt trigger inputs transform slowly changing input signals into sharply defined jitter- • Complies with JEDEC standard no. 7A\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n\n• Multiple package options\n• Specified from −40 °C to +85 °C and from −40 °C to +125 °C;

Quad 2-input NAND Schmitt trigger

The 74HC132; 74HCT132 is a quad 2-input NAND gate with Schmitt-trigger inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Schmitt trigger inputs transform slowly changing input signals into sharply defined jitter- • Complies with JEDEC standard no. 7A\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n\n• Multiple package options\n• Specified from −40 °C to +85 °C and from −40 °C to +125 °C;

Quad 2-input NAND Schmitt trigger

GENERAL DESCRIPTION The 74HC/HCT132 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT132 contain four 2-input NAND gates which accept standard input signals. They are capable

Quad 2-input NAND Schmitt trigger

The 74HC132-Q100; 74HCT132-Q100 is a quad 2-input NAND gate with Schmitt-trigger inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Schmitt trigger inputs transform slowly changing input signals into sharply defin • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Complies with JEDEC standard no. 7A\n• ESD protection:• MIL-STD-883, method 3015 exceeds 2000 V\n• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200;

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC GATE NAND SCHMIT 4CH 2IN 14SO 集成电路（IC） 门和反相器

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC GATE NAND SCHMIT 4CH 2IN 14SO 集成电路（IC） 门和反相器

Quad 2-input NAND Schmitt trigger

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Quad 2-input NAND Schmitt trigger

GENERAL DESCRIPTION The 74HC/HCT132 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT132 contain four 2-input NAND gates which accept standard input signals. They are capable

Quad 2-input NAND Schmitt trigger

GENERAL DESCRIPTION The 74HC/HCT132 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT132 contain four 2-input NAND gates which accept standard input signals. They are capable

QUAD 2-INPUT SCHMITT NAND GATE

DESCRIPTION The M74HCT132 is an high speed CMOS QUAD 2-INPUT SCHMITT NAND GATE fabricated with silicon gate C2MOS technology. Pin configuration and function are the same as those of the M74HCT00. The hysteresis characteristics (around 20 Vcc) of all inputs allow slowly changing input signals to