DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The M74HC76 is an high speed CMOS DUAL J-K FLIP FLOP WITH CLEAR fabricated with silicon gate C2MOS technology. ■ HIGH SPEED : fMAX = 67MHz (TYP.) at VCC = 6V ■ LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C ■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.) ■ SYMMETRICAL OUTPUT

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The M74HC76 is an high speed CMOS DUAL J-K FLIP FLOP WITH CLEAR fabricated with silicon gate C2MOS technology. ■ HIGH SPEED : fMAX = 67MHz (TYP.) at VCC = 6V ■ LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C ■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.) ■ SYMMETRICAL OUTPUT

Dual JK Flip-Flop With Set and Reset

Dual JK Flip-Flop With Set and Reset High–Performance Silicon–Gate CMOS The MC74HC76 is identical in pinout to the LS76. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Each flip–flop is negative–edge clocked and has ac

Dual JK Flip-Flop With Set and Reset

Dual JK Flip-Flop With Set and Reset High–Performance Silicon–Gate CMOS The MC74HC76 is identical in pinout to the LS76. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Each flip–flop is negative–edge clocked and has ac

Dual JK Flip-Flop With Set and Reset

Dual JK Flip-Flop With Set and Reset High–Performance Silicon–Gate CMOS The MC74HC76 is identical in pinout to the LS76. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Each flip–flop is negative–edge clocked and has ac