丝印代码：74HC595；8-bit shift register with output latches (3-state)

Description The M74HC595 device is a high speed CMOS 8-bit shift register with output latches (3-state) fabricated with silicon gate C2MOS technology. This device contains an 8-bit serial in, parallel out shift register that feeds an 8-bit D-type storage register. The storage register has 8

8-Bit Shift Registers with Output Latches

The 74HC595 is a high speed shift register utilizes advanced silicon-gate CMOS technology. This device possesses the high noise immunity and low power consumption of standard CMOS integrated circuits. This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type sto • Low quiescent current: 80µA maximum\n\n• Low input current: 1µA maximum\n\n• 8-bit serial-in, parallel-out shift register with storage\n\n• Wide operating voltage range: 2.0V to 6.0V\n\n• Shift register has direct clear\n\n• Guaranteed shift frequency: DC to 30 MHz\n\n• Package information:;

8-bit shif t registers with 3-state output latches in bare die form

Description The 74HC595 is an 8–bit serial-in to parallel-out shift register which drives an 8–bit D–type latch with 3–state outputs. Both register and latch have independent positive triggered clock inputs. All registers capture data on rising edge and change output on the falling edge. If

8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs

8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs The MC74HC595A consists of an 8−bit shift register and an 8−bit D−type latch with three−state parallel outputs. The shift register accepts serial data and provides a serial output. The shift register also pro

8-bit serial-in/serial or parallel-out shift register with output latches; 3-state

DESCRIPTION The 74HC/HCT595 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT595 is an 8-stage serial shift register with a storage register and 3-state outputs. The shift regi

8 BIT SHIFT REGISTER WITH OUTPUT LATCHES 3 STATE

DESCRIPTION The M54/74HC595 is a high speed CMOS 8-BIT SHIFT REGISTERS/OUTPUT LATCHES (3-STATE) fabricated in silicon C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. This device contains an 8-bit serial-in, parallel-out shift regist

8-bit Shift Register/Latch (with 3-state outputs)

Description This device each contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift register and the storage register. The shift register has a direct-

8?묪it Serial?묲nput/Serial or Parallel?뭀utput Shift Register with Latched 3?뭆tate Outputs

The 74HC595 consists of an 8−bit shift register and an 8−bit D−type latch with three−state parallel outputs. The shift register accepts serial data and provides a serial output. The shift register also provides parallel data to the 8−bit latch. The shift register and latch have independent clock i

LED驱动芯片

74HC595是8位串行输入，并行或串行输出的移位寄存器，输出具有锁存（3态）功能。

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

1. General description The 74HC595; 74HCT595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading a

8?묪it Serial?묲nput/Serial or Parallel.Output Shift Register with Latched 3?뭆tate Outputs

The 74HC595 consists of an 8−bit shift register and an 8−bit D−type latch with three−state parallel outputs. The shift register accepts serial data and provides a serial output. The shift register also provides parallel data to the 8−bit latch. The shift register and latch have independent clock i

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

8-BIT SHIFT REGISTER WITH 8-BIT OUTPUT REGISTER

文件：249.15 Kbytes Page：11 Pages

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

High Speed CMOS Logic

文件：1.92325 Mbytes Page：9 Pages

8-Bit Shift Registers W ith Latched 3-State Output

文件：251.37 Kbytes Page：8 Pages

8 位 CMOS 移位寄存器 驱动电流35mA

丝印代码：74HC595D；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description • 8-Bit Shift Register/Latch (3-state) General The 74HC595D is a high speed 8-BIT SHIFT REGISTER/LATCH fabricated with silicon gate C2MOS technology. It achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The 7

丝印代码：74HC595Y；8-bit shift register with output latches (3-state)

Description The M74HC595 device is a high speed CMOS 8-bit shift register with output latches (3-state) fabricated with silicon gate C2MOS technology. This device contains an 8-bit serial in, parallel out shift register that feeds an 8-bit D-type storage register. The storage register has 8

8-bit shif t registers with 3-state output latches in bare die form

Description The 74HC595 is an 8–bit serial-in to parallel-out shift register which drives an 8–bit D–type latch with 3–state outputs. Both register and latch have independent positive triggered clock inputs. All registers capture data on rising edge and change output on the falling edge. If

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

1. General description The 74HC595; 74HCT595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading a

8-bit serial-in/serial or parallel-out shift register with output latches; 3-state

DESCRIPTION The 74HC/HCT595 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT595 is an 8-stage serial shift register with a storage register and 3-state outputs. The shift regi

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

1. General description The 74HC595-Q100; 74HCT595-Q100 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable c

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

1. General description The 74HC595; 74HCT595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading a

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

1. General description The 74HC595; 74HCT595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading a

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

1. General description The 74HC595; 74HCT595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading a

8-bit serial-in/serial or parallel-out shift register with output latches; 3-state

DESCRIPTION The 74HC/HCT595 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT595 is an 8-stage serial shift register with a storage register and 3-state outputs. The shift regi

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

8-bit serial-in/serial or parallel-out shift register with output latches; 3-state

DESCRIPTION The 74HC/HCT595 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT595 is an 8-stage serial shift register with a storage register and 3-state outputs. The shift regi

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

8?묪it Serial?묲nput/Serial or Parallel.Output Shift Register with Latched 3?뭆tate Outputs

The 74HC595 consists of an 8−bit shift register and an 8−bit D−type latch with three−state parallel outputs. The shift register accepts serial data and provides a serial output. The shift register also provides parallel data to the 8−bit latch. The shift register and latch have independent clock i

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

1. General description The 74HC595-Q100; 74HCT595-Q100 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable c

8?묪it Serial?묲nput/Serial or Parallel?뭀utput Shift Register with Latched 3?뭆tate Outputs

The 74HC595 consists of an 8−bit shift register and an 8−bit D−type latch with three−state parallel outputs. The shift register accepts serial data and provides a serial output. The shift register also provides parallel data to the 8−bit latch. The shift register and latch have independent clock i

8?묪it Serial?묲nput/Serial or Parallel?뭀utput Shift Register with Latched 3?뭆tate Outputs

The 74HC595 consists of an 8−bit shift register and an 8−bit D−type latch with three−state parallel outputs. The shift register accepts serial data and provides a serial output. The shift register also provides parallel data to the 8−bit latch. The shift register and latch have independent clock i

8-bit serial-in/serial or parallel-out shift register with output latches; 3-state

DESCRIPTION The 74HC/HCT595 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT595 is an 8-stage serial shift register with a storage register and 3-state outputs. The shift regi

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

8-bit serial-in/serial or parallel-out shift register with output latches; 3-state

DESCRIPTION The 74HC/HCT595 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT595 is an 8-stage serial shift register with a storage register and 3-state outputs. The shift regi

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

1. General description The 74HC595; 74HCT595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading a

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

1. General description The 74HC595-Q100; 74HCT595-Q100 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable c

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

1. General description The 74HC595-Q100; 74HCT595-Q100 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable c

Display driver IC

文件：227.06 Kbytes Page：5 Pages

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

文件：287.98 Kbytes Page：23 Pages

封装/外壳：16-VFQFN 裸露焊盘 功能：串行至并行，串行 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC SHIFT REGISTER 8BIT 16DHVQFN 集成电路（IC） 移位寄存器

封装/外壳：16-XFQFN 裸露焊盘 功能：串行至并行，串行 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：74HC595BZ/SOT8016/DHXQFN16 集成电路（IC） 移位寄存器

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

8-Bit Shift Registers with Output Latches

文件：219.77 Kbytes Page：9 Pages

3-state 8-bit shift register

文件：523.51 Kbytes Page：8 Pages

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state