4-to-16 line decoder/demultiplexer with input latches; inverting

GENERAL DESCRIPTION The 74HC/HCT4515 are high-speed Si-gate CMOS devices and are pin compatible with “4515” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. FEATURES • Inverting outputs • Output capability: standard • ICC category: MSI

4-to-16 line decoder/demultiplexer with input latches; inverting

GENERAL DESCRIPTION The 74HC/HCT4515 are high-speed Si-gate CMOS devices and are pin compatible with “4515” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. FEATURES • Inverting outputs • Output capability: standard • ICC category: MSI

4-to-16 line decoder/demultiplexer with input latches; inverting

FEATURES · Inverting outputs · Output capability: standard · ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT4515 are high-speed Si-gate CMOS devices and are pin compatible with “4515” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT4515

4-to-16 line decoder/demultiplexer with input latches; inverting

1 General description The 74HC4515 is a 4-to-16 line decoder/demultiplexer having four binary weighted address inputs (A0 to A3) with latches, a latch enable input (LE), an enable input (E) and 16 inverting outputs (Q0, to Q15). When LE is HIGH, the selected output is determined by the data on

封装/外壳：24-DIP（0.600"，15.24mm） 包装：托盘 描述：IC DECODER/DEMUX 1X4:16 24DIP 集成电路（IC） 信号开关，多路复用器，解码器

4-to-16 line decoder/demultiplexer with input latches; inverting

GENERAL DESCRIPTION The 74HC/HCT4515 are high-speed Si-gate CMOS devices and are pin compatible with “4515” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. FEATURES • Inverting outputs • Output capability: standard • ICC category: MSI

4-to-16 line decoder/demultiplexer with input latches; inverting

1 General description The 74HC4515 is a 4-to-16 line decoder/demultiplexer having four binary weighted address inputs (A0 to A3) with latches, a latch enable input (LE), an enable input (E) and 16 inverting outputs (Q0, to Q15). When LE is HIGH, the selected output is determined by the data on